Definitions of equivalence for transformational synthesis of embedded systems

Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried out systematically. The authors present a computational model for embedded systems based on Petri nets called PRES+. It includes an explicit notion of time and allows a concise formulation of models. Tokens, in our notation hold information, and transitions when fired perform transformation of data. Based on this model we define several notions of equivalence (reachable, behavioral, time, and total), which provide the framework for transformational synthesis of embedded systems. Different representations of an Ethernet network coprocessor are studied in order to illustrate the applicability of PRES+ and the definitions of equivalence on practical systems.

[1]  Carlo Ghezzi,et al.  Analyzing refinements of state based specifications: the case of TB nets , 1993, ISSTA '93.

[2]  Tadao Murata,et al.  Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.

[3]  Wolfgang Rosenstiel,et al.  A Petri Net Model for Hardware/Software Codesign , 1999, Des. Autom. Embed. Syst..

[4]  Erik Stoy,et al.  An integrated modelling technique for hardware/software systems , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[5]  Frank Vahid,et al.  Modeling with SpecCharts , 1990 .

[6]  C. Ramchandani,et al.  Analysis of asynchronous concurrent systems by timed petri nets , 1974 .

[7]  Petru Eles,et al.  A Petri Net based Model for Heterogeneous Embedded Systems , 1999 .

[8]  P. Merlin,et al.  Recoverability of Communication Protocols - Implications of a Theoretical Study , 1976, IEEE Transactions on Communications.

[9]  Jürgen Teich,et al.  CodeSign: an embedded system design environment , 1998 .

[10]  Sadatoshi Kumagai,et al.  Equivalent net abstraction and firing sequence preservation , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[11]  Wlodzimierz M. Zuberek,et al.  Hierarchies of place/transition refinements in Petri nets , 1996, Proceedings 1996 IEEE Conference on Emerging Technologies and Factory Automation. ETFA '96.

[12]  Rajesh Gupta,et al.  System synthesis via hardware-software co-design , 1992 .

[13]  Joseph Sifakis Performance Evaluation of Systems Using Nets , 1979, Advanced Course: Net Theory and Applications.

[14]  Kurt Lautenbach,et al.  System Modelling with High-Level Petri Nets , 1981, Theor. Comput. Sci..

[15]  Manuel Silva Suárez,et al.  Reducing the computational complexity of scheduling problems in Petri nets by means of transformation rules , 1998, SMC'98 Conference Proceedings. 1998 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.98CH36218).

[16]  G. Dittrich Modeling of complex systems using hierarchically represented Petri nets , 1995, 1995 IEEE International Conference on Systems, Man and Cybernetics. Intelligent Systems for the 21st Century.

[17]  Kurt Jensen,et al.  Coloured Petri Nets , 1997, Monographs in Theoretical Computer Science An EATCS Series.

[18]  Lucia Pomello,et al.  Some equivalence notions for concurrent systems. An overview , 1985, Applications and Theory in Petri Nets.

[19]  Edmund M. Clarke,et al.  Formal Methods: State of the Art and Future Directions Working Group Members , 1996 .

[20]  Petru Eles,et al.  System Synthesis with VHDL , 1997 .

[21]  Luciano Lavagno,et al.  Models of computation for embedded system design , 1999 .

[22]  Stephen A. Edwards,et al.  Design of embedded systems: formal models, validation, and synthesis , 1997, Proc. IEEE.

[23]  Gérard Berthelot,et al.  Checking properties of nets using transformation , 1985, Applications and Theory in Petri Nets.

[24]  M.P.J. Stevens,et al.  Petri net modelling in embedded system design , 1992, CompEuro 1992 Proceedings Computer Systems and Software Engineering.