RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip

Multiprocessor designs have become popular in embedded domains for achieving the power and performance requirements. In this paper, we present principles and techniques for design and implementation of RTOS for embedded multiprocessor systems. We also present a system-level design toolkit for rapid design and evaluation of embedded multiprocessor systems.

[1]  F. Hatori,et al.  An H.264/MPEG-4 audio/visual CODEC LSI with module-wise dynamic voltage/frequency scaling , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[2]  T. Fujiyoshi,et al.  A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling , 2006, IEEE Journal of Solid-State Circuits.

[3]  S. Suzuki,et al.  A 600MIPS 120mW 70/spl mu/A leakage triple-CPU mobile application processor chip , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[4]  Chris Sullivan,et al.  Using C based logic synthesis to bridge the productivity gap , 2004 .

[5]  Kazutoshi Wakabayashi.  C-based behavioral synthesis and verification analysis on industrial design examples , 2004, ASP-DAC.