A new CMOS 4Q–multiplier using linear and saturation regions complementally

A New Four-Quadrant (4Q) Multiplier complementally using linear and saturation regions of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is proposed. This multiplier operates in the region except for threshold voltage VTto zero, using a novel non-linearity cancellalion method. The validity of proposed circuit is confirmed through HSPICE simulation.