Embedded system design

Until the late 1980s, information processing was associated with large mainframe computers and huge tape drives. During the 1990s, this trend shifted toward information processing with personal computers, or PCs. The trend toward miniaturization continues and in the future the majority of information processing systems will be small mobile computers, many of which will be embedded into larger products and interfaced to the physical environment. Hence, these kinds of systems are called embedded systems. Embedded systems together with their physical environment are called cyber-physical systems. Examples include systems such as transportation and fabrication equipment. It is expected that the total market volume of embedded systems will be significantly larger than that of traditional information processing systems such as PCs and mainframes. Embedded systems share a number of common characteristics. For example, they must be dependable, efficient, meet real-time constraints and require customized user interfaces (instead of generic keyboard and mouse interfaces). Therefore, it makes sense to consider common principles of embedded system design.Embedded System Design starts with an introduction into the area and a survey of specification models and languages for embedded and cyber-physical systems. It provides a brief overview of hardware devices used for such systems and presents the essentials of system software for embedded systems, like real-time operating systems. The book also discusses evaluation and validation techniques for embedded systems. Furthermore, the book presents an overview of techniques for mapping applications to execution platforms. Due to the importance of resource efficiency, the book also contains a selected set of optimization techniques for embedded systems, including special compilation techniques. The book closes with a brief survey on testing.Embedded System Design can be used as a text book for courses on embedded systems and as a source which provides pointers to relevant material in the area for PhD students and teachers. It assumes a basic knowledge of information processing hardware and software. Courseware related to this book is available at http://ls12-www.cs.tu-dortmund.de/~marwedel.

[1]  P. Marwedel,et al.  Control flow driven splitting of loop nests at the source code level , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[2]  Lui Sha,et al.  Priority Inheritance Protocols: An Approach to Real-Time Synchronization , 1990, IEEE Trans. Computers.

[3]  Doron Drusinsky,et al.  Using statecharts for hardware description and synthesis , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Paolo Bernardi,et al.  Using infrastructure IPs to support SW-based self-test of processor cores , 2004, Fifth International Workshop on Microprocessor Test and Verification (MTV'04).

[5]  Qiang Xu,et al.  Lifetime reliability-aware task allocation and scheduling for MPSoC platforms , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[6]  Maryline Chetto,et al.  Dynamic scheduling of real-time tasks under precedence constraints , 1990, Real-Time Systems.

[7]  Rainer Leupers,et al.  MAPS: An integrated framework for MPSoC application parallelization , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[8]  David Harel,et al.  LSCs: Breathing Life into Message Sequence Charts , 1999, Formal Methods Syst. Des..

[9]  Krithi Ramamritham,et al.  Using Windows NT for Real-Time Applications: Experimental Observations and Recommendations , 1998, IEEE Real Time Technology and Applications Symposium.

[10]  Peter Marwedel,et al.  Dynamic overlay of scratchpad memory for energy minimization , 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

[11]  Daniel C. Liebisch,et al.  JESSI common framework design management-the means to configuration and execution of the design process , 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

[12]  Luca Benini,et al.  A survey of design techniques for system-level dynamic power management , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[13]  Luciano Lavagno,et al.  Task generation and compile-time scheduling for mixed data-control embedded software , 2000, Proceedings 37th Design Automation Conference.

[14]  Thomas Weigert,et al.  Introduction to UML and the Modeling of Embedded Systems , 2005, Embedded Systems Handbook.

[15]  Tajana Simunic,et al.  Temperature Aware Task Scheduling in MPSoCs , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[16]  Hugo De Man,et al.  Memory Size Reduction Through Storage Order Optimization for Embedded Parallel Multimedia Applications , 1997, Parallel Comput..

[17]  Henry G. Dietz,et al.  The Scc Compiler: SWARing at MMX 3DNow! , 1999, LCPC.

[18]  P. Marwedel,et al.  Cooperation of synthesis, retargetable code generation and test generation in the MSS , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.

[19]  Paul Lokuciejewski WCET-aware source code and assembly level optimization techniques for real-time systems , 2010 .

[20]  Gang Ren,et al.  Optimizing data permutations for SIMD devices , 2006, PLDI '06.

[21]  Horst F. Wedde,et al.  Integration of task scheduling and file services in the safety-critical system MELODY , 1998, Proceeding. 10th EUROMICRO Workshop on Real-Time Systems (Cat. No.98EX168).

[22]  Paul Chow,et al.  Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation , 2000, CASES '00.

[23]  Sharad Malik,et al.  Power analysis of embedded software: a first step towards software power minimization , 1994, IEEE Trans. Very Large Scale Integr. Syst..

[24]  Sharad Malik,et al.  Memory bank and register allocation in software synthesis for ASIPs , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[26]  Peter Marwedel,et al.  An Accurate and Fine Grain Instruction-Level Energy Model Supporting Software Optimizations , 2007 .

[27]  Günter Grünsteidl,et al.  TTP - A Protocol for Fault-Tolerant Real-Time Systems , 1994, Computer.

[28]  Xi Chen,et al.  Properties of and improvements to time-domain dynamic thermal analysis algorithms , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[29]  Erik Brockmeyer,et al.  Layer assignment techniques for low energy in multi-layered memory organisations , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[30]  R. Leupers Code selection for media processors with SIMD instructions , 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

[31]  Niraj K. Jha,et al.  Software architectural transformations: a new approach to low energy embedded software , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[32]  Jean-Claude Geffroy,et al.  Design of Dependable Computing Systems , 2002, Springer Netherlands.

[33]  Edward A. Lee,et al.  Hierarchical static scheduling of dataflow graphs onto multiple processors , 1995, 1995 International Conference on Acoustics, Speech, and Signal Processing.

[34]  Giovanni De Micheli,et al.  Readings in hardware / software co-design , 2001 .

[35]  Jose Renau,et al.  Characterizing processor thermal behavior , 2010, ASPLOS XV.

[36]  Sanjay V. Rajopadhye,et al.  Optimizing memory usage in the polyhedral model , 2000, TOPL.

[37]  E. Rijpkema,et al.  Compaan: deriving process networks from Matlab for embedded signal processing architectures , 2000, Proceedings of the Eighth International Workshop on Hardware/Software Codesign. CODES 2000 (IEEE Cat. No.00TH8518).

[38]  Luca Benini,et al.  Quantitative comparison of power management algorithms , 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

[39]  Sandeep Neema,et al.  Compositional Specification of Behavioral Semantics , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[40]  P. Fishbane,et al.  Physics for scientists and engineers : with modern physics , 2005 .

[41]  Fernando Herrera,et al.  Embedded software generation from systemC for platform based design , 2003 .

[42]  Sharad Malik,et al.  Optimal code generation for embedded memory non-homogeneous register architectures , 1995 .

[43]  Peter Marwedel,et al.  Operating system integrated energy aware scratchpad allocation strategies for multiprocess applications , 2007, SCOPES '07.

[44]  Rainer Leupers,et al.  Function inlining under code size constraints for embedded processors , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[45]  Margaret Martonosi,et al.  Wattch: a framework for architectural-level power analysis and optimizations , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).

[46]  Petru Eles,et al.  Energy-efficient mapping and scheduling for DVS enabled distributed embedded systems , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[47]  Scott A. Mahlke,et al.  A framework for balancing control flow and predication , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.

[48]  Lars Wehmeyer,et al.  Energy aware compilation for DSPs with SIMD instructions , 2002, LCTES/SCOPES '02.

[49]  Giuseppe Lipari,et al.  IRIS: a new reclaiming algorithm for server-based real-time systems , 2004, Proceedings. RTAS 2004. 10th IEEE Real-Time and Embedded Technology and Applications Symposium, 2004..

[50]  Edward A. Lee,et al.  Overview of the Ptolemy project , 2001 .

[51]  Peter Marwedel,et al.  Scratchpad memory: a design alternative for cache on-chip memory in embedded systems , 2002, Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002 (IEEE Cat. No.02TH8627).

[52]  Wolfgang Schröder-Preikschat,et al.  PURE Embedded Operating Systems — CiAO ∗ , 2006 .

[53]  Giorgio C. Buttazzo,et al.  A hyperbolic bound for the rate monotonic algorithm , 2001, Proceedings 13th Euromicro Conference on Real-Time Systems.

[54]  Brian W. Kernighan,et al.  The C Programming Language , 1978 .

[55]  Alberto Sangiovanni-Vincentelli,et al.  Embedded system design and hybrid systems , 1997 .

[56]  Francky Catthoor,et al.  Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems , 1999, Springer US.

[57]  Peter Marwedel,et al.  Fast, efficient and predictable memory accesses - optimization algorithms for memory architecture aware compilation , 2006 .

[58]  Hiroto Yasuura,et al.  Voltage scheduling problem for dynamically variable voltage processors , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[59]  Daniel Ménard,et al.  Automatic evaluation of the accuracy of fixed-point algorithms , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[60]  Peng Yang,et al.  Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform , 2001, Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571).

[61]  Jeffrey D. Ullman,et al.  Introduction to Automata Theory, Languages and Computation , 1979 .

[62]  Georges G. E. Gielen,et al.  Figure of merit based selection of A/D converters , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[63]  Sang Lyul Min,et al.  An Accurate Instruction-Level Energy Consumption Model for Embedded RISC Processors , 2001 .

[64]  Robert de Simone,et al.  The Synchronous Hypothesis and Synchronous Languages , 2005, Embedded Systems Handbook.

[65]  Yervant Zorian,et al.  Instruction-Based Self-Testing of Processor Cores , 2003, J. Electron. Test..

[66]  Jacob A. Abraham,et al.  Functional Testing of Microprocessors , 1984, IEEE Transactions on Computers.

[67]  Elvinia Riccobene,et al.  A UML 2.0 profile for SystemC: toward high-level SoC design , 2005, EMSOFT.

[68]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[69]  Scott Mahlke,et al.  Effective compiler support for predicated execution using the hyperblock , 1992, MICRO 1992.

[70]  Michael Gschwind,et al.  Optimizing Compiler for the CELL Processor , 2005, 14th International Conference on Parallel Architectures and Compilation Techniques (PACT'05).

[71]  Jeffry T. Russell,et al.  Software power estimation and optimization for high performance, 32-bit embedded processors , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

[72]  Qiang Xu,et al.  AgeSim: A simulation framework for evaluating the lifetime reliability of processor-based SoCs , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[73]  Rainer Leupers,et al.  Array index allocation under register constraints in DSP programs , 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

[74]  Luca Benini,et al.  Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[75]  J. Teich,et al.  3D exploration of software schedules for DSP algorithms , 1999, Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450).

[76]  Gustavo de Veciana,et al.  Lower bound on latency for VLIW ASIP datapaths , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[77]  Trevor Mudge,et al.  Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads , 2002, ICCAD 2002.

[78]  C. Petri Kommunikation mit Automaten , 1962 .

[79]  Koen De Bosschere,et al.  Automated reduction of the memory footprint of the Linux kernel , 2007, TECS.

[80]  Gianluca Palermo,et al.  A data protection unit for NoC-based architectures , 2007, 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[81]  Rajeev Barua,et al.  An optimal memory allocation scheme for scratch-pad-based embedded systems , 2002, TECS.

[82]  Jacques Rouillard,et al.  High-Level System Modeling , 1995 .

[83]  P ? ? ? ? ? ? ? % ? ? ? ? , 1991 .

[84]  Gary B. Lamont,et al.  Evolutionary Algorithms for Solving Multi-Objective Problems , 2002, Genetic Algorithms and Evolutionary Computation.

[85]  Peter Marwedel,et al.  Reducing energy consumption by dynamic copying of instructions onto onchip memory , 2002, 15th International Symposium on System Synthesis, 2002..

[86]  Michael E. Wolf,et al.  The cache performance and optimizations of blocked algorithms , 1991, ASPLOS IV.

[87]  Christian Haubelt,et al.  SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications , 2009, TODE.

[88]  Rajeev Barua,et al.  Dynamic allocation for scratch-pad memory using compile-time decisions , 2006, TECS.

[89]  Andy J. Wellings,et al.  Guidelines for a graduate curriculum on embedded software and systems , 2005, TECS.

[90]  Todor Stefanov,et al.  Throughput modeling to evaluate process merging transformations in polyhedral process networks , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[91]  Luca Benini,et al.  Dynamic voltage scaling and power management for portable systems , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[92]  Rainer Leupers,et al.  Algorithms for address assignment in DSP code generation , 1996, ICCAD 1996.

[93]  Jianwen Zhu,et al.  Specification and Design of Embedded Systems , 1998, Informationstechnik Tech. Inform..

[94]  Wolfgang Schröder-Preikschat,et al.  CiAO: An Aspect-Oriented Operating-System Family for Resource-Constrained Embedded Systems , 2009, USENIX Annual Technical Conference.

[95]  Thorsten Grotker,et al.  System Design with SystemC , 2002 .

[96]  Margaret Martonosi,et al.  Techniques for Multicore Thermal Management: Classification and New Exploration , 2006, ISCA 2006.

[97]  Gustavo de Veciana,et al.  Application-specific clustered VLIW datapaths: early exploration on a parameterized design space , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[98]  Fernando Herrera,et al.  Systemic Embedded Software Generation from SystemC , 2003, DATE.

[99]  Zbigniew Michalewicz,et al.  Handbook of Evolutionary Computation , 1997 .

[100]  蔡進發,et al.  Monitoring and Debugging Distributed Real-Time Systems , 1993 .

[101]  Sujit Dey,et al.  Embedded Software-Based Self-Test for Programmable Core-Based Designs , 2002, IEEE Des. Test Comput..

[102]  Richard Gerber The Software Optimization Cookbook , 2002 .

[103]  Frank Bellosa,et al.  Event-Driven Thermal Management in SMP Systems , 2005 .

[104]  Dirk Bouwmeester,et al.  The physics of quantum information: quantum cryptography, quantum teleportation, quantum computation , 2010, Physics and astronomy online library.

[105]  Peter Marwedel,et al.  Three Decades of Hardware Description Languages in Europe , 1998 .

[106]  Michael Pilato Version Control with Subversion , 2004 .

[107]  Michael F. P. O'Boyle,et al.  A complete compiler approach to auto-parallelizing C programs for multi-DSP systems , 2005, IEEE Transactions on Parallel and Distributed Systems.

[108]  Steven F. Barrett,et al.  Embedded Systems: Design and Applications with the 68HC12 and HCS12 , 2004 .

[109]  Thomas D. Burd,et al.  Design issues for Dynamic Voltage Scaling , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[110]  An-Ping Zeng,et al.  Editors 2010 , 2010 .

[111]  A. Moore,et al.  REAL-TIME EXTENSIONS TO UML , 1998 .

[112]  Peter Marwedel,et al.  Assigning program and data objects to scratchpad for energy reduction , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[113]  Luca Benini,et al.  Dynamic power management - design techniques and CAD tools , 1997 .

[114]  Nicolae Marian,et al.  Translation of Simulink Models to Component-based Software Models , 2007 .

[115]  Rainer Leupers,et al.  Instruction scheduling for clustered VLIW DSPs , 2000, Proceedings 2000 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00622).

[116]  Kendall Scott,et al.  UML distilled - applying the standard object modeling language , 1997 .

[117]  Carl E. Landwehr,et al.  Basic concepts and taxonomy of dependable and secure computing , 2004, IEEE Transactions on Dependable and Secure Computing.

[118]  Luca Benini,et al.  Memory design techniques for low energy embedded systems , 2002 .

[119]  Nikil D. Dutt,et al.  Rapid estimation for parameterized components in high-level synthesis , 1993, IEEE Trans. Very Large Scale Integr. Syst..

[120]  G. De Micheli,et al.  Cycle-accurate simulation of energy consumption in embedded systems , 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

[121]  Michael Weiss,et al.  BREAKING NEW GROUNDS OVER 3000 M MAC/s: A BROADBAND MOBILE MULTIMEDIA MODEM DSP , 1998 .

[122]  Pierre G. Paulin,et al.  Force-Directed Scheduling in Automatic Data Path Synthesis , 1987, 24th ACM/IEEE Design Automation Conference.

[123]  Anshul Kumar,et al.  ASIP design methodologies: survey and issues , 2001, VLSI Design 2001. Fourteenth International Conference on VLSI Design.

[124]  D. Parnas,et al.  On satisfying timing constraints in hard-real-time systems , 1991, SIGSOFT '91.

[125]  Heinrich Meyr,et al.  FRIDGE: a fixed-point design and simulation environment , 1998, Proceedings Design, Automation and Test in Europe.

[126]  G. de Veciana,et al.  Exploring performance tradeoffs for clustered VLIW ASIPs , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[127]  Alan Burns,et al.  Real-Time Systems and Programming Languages , 2009 .

[128]  Rajesh Gupta,et al.  Profile-based dynamic voltage scheduling using program checkpoints , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[129]  Rainer Leupers,et al.  A uniform optimization technique for offset assignment problems , 1998, Proceedings. 11th International Symposium on System Synthesis (Cat. No.98EX210).

[130]  Rolf Ernst,et al.  System level performance analysis - the SymTA/S approach , 2005 .

[131]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.

[132]  José Ignacio Hidalgo,et al.  Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation , 2007, SCOPES '07.

[133]  Wolfgang Rosenstiel,et al.  Simulation-based verification of the MOST NetInterface specification revision 3.0 , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[134]  Heonshik Shin,et al.  Scratchpad memory management for portable systems with a memory management unit , 2006, EMSOFT '06.

[135]  Wang Yi,et al.  Timed Automata: Semantics, Algorithms and Tools , 2003, Lectures on Concurrency and Petri Nets.

[136]  Yu Hu,et al.  IVF: characterizing the vulnerability of microprocessor structures to intermittent faults , 2010, DATE 2010.

[137]  Henry G. Dietz,et al.  Compiling for SIMD Within a Register , 1998, LCPC.

[138]  Gert Goossens,et al.  Code Generation for Embedded Processors , 1995 .

[139]  Krithi Ramamritham,et al.  The Spring kernel: a new paradigm for real-time systems , 1991, IEEE Software.

[140]  Edward A. Lee Computing Foundations and Practice for Cyber- Physical Systems: A Preliminary Report , 2007 .

[141]  Heiko Falk,et al.  Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization , 2006, 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia.

[142]  Kurt Keutzer,et al.  Code Optimization Techniques for Embedded DSP Microprocessors , 1995, 32nd Design Automation Conference.

[143]  James E. Smith,et al.  Virtual machines - versatile platforms for systems and processes , 2005 .

[144]  Ahmed Amine Jerraya,et al.  Embedded Software Design and Programming of Multiprocessor System-on-Chip: Simulink and System C Case Studies , 2010 .

[145]  Neil Weste,et al.  Principles of CMOS VLSI Design , 1985 .

[146]  Chung Laung Liu,et al.  Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment , 1989, JACM.

[147]  Peter Marwedel,et al.  A new optimization technique for improving resource exploitation and critical path minimization , 1997, Proceedings. Tenth International Symposium on System Synthesis (Cat. No.97TB100114).

[148]  Mahmut T. Kandemir,et al.  Dynamic management of scratch-pad memory space , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[149]  David Blaauw,et al.  Process variation and temperature-aware reliability management , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[150]  Robert W. Brodersen,et al.  An automated floating-point to fixed-point conversion methodology , 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

[151]  H. Meyr,et al.  System Level Fixed-point Design Based On An Interpolative Approach , 1997, Proceedings of the 34th Design Automation Conference.

[152]  Tom Gunter,et al.  Microsystems a Microprocessor Architecture for a Changing World: The Motorola 68000 , 1979, Computer.

[153]  Thomas Bäck,et al.  An Overview of Evolutionary Algorithms for Parameter Optimization , 1993, Evolutionary Computation.

[154]  Ayal Zaks,et al.  Auto-vectorization of interleaved data for SIMD , 2006, PLDI '06.

[155]  William J. Dally,et al.  Register organization for media processing , 2000, Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550).

[156]  Rainer Leupers,et al.  Time-constrained code compaction for DSPs , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[157]  Luciano Lavagno,et al.  Scheduling for Embedded Real-Time Systems , 1998, IEEE Des. Test Comput..

[158]  Y.-K. Kwok,et al.  Static scheduling algorithms for allocating directed task graphs to multiprocessors , 1999, CSUR.

[159]  Gerhard Fohler Embedded Systems Design - The ARTIST Roadmap for Research and Development , 2005 .

[160]  Anantha P. Chandrakasan,et al.  Low-power CMOS digital design , 1992 .

[161]  V. Daniel Hunt,et al.  RFID: A Guide to Radio Frequency Identification , 2007 .

[162]  Peter Marwedel,et al.  Retargetable Self-Test Program Generation Using Constraint Logic Programming , 1995, 32nd Design Automation Conference.

[163]  Luca Benini,et al.  Source code transformation based on software cost analysis , 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

[164]  Ed F. Deprettere,et al.  Daedalus: Toward composable multimedia MP-SoC design , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[165]  Wolfgang Ecker,et al.  Hardware-dependent Software: Principles and Practice , 2009 .

[166]  Rainer Leupers,et al.  Retargetable compiler technology for embedded systems - tools and applications , 2001 .

[167]  Calton Pu,et al.  Specialization tools and techniques for systematic optimization of system software , 2001, TOCS.

[168]  Thomas D. Burd,et al.  Energy efficient microprocessor design , 2001 .

[169]  Gerhard Fettweis,et al.  Compiler based exploration of DSP energy savings by SIMD operations , 2004, ASP-DAC.

[170]  Somesh Jha,et al.  Verification of the Futurebus+ cache coherence protocol , 1993, Formal Methods Syst. Des..

[171]  Srinivas Devadas,et al.  Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures , 1997, Des. Autom. Embed. Syst..

[172]  Kurt Keutzer,et al.  Storage assignment to decrease code size , 1996, TOPL.

[173]  Peter Marwedel,et al.  Scratchpad sharing strategies for multiprocess embedded systems: a first approach , 2005, 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005..

[174]  Daniel D. Gajski,et al.  SPECC: Specification Language and Methodology , 2000 .

[175]  Hugo De Man,et al.  Array placement for storage size reduction in embedded multimedia systems , 1997, Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors.

[176]  Mahmut T. Kandemir,et al.  Dynamic Scratch-Pad Memory Management for Irregular Array Access Patterns , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[177]  Rajeev Barua,et al.  Heap data allocation to scratch-pad memory in embedded systems , 2005, J. Embed. Comput..

[178]  Rajeev Alur,et al.  A Theory of Timed Automata , 1994, Theor. Comput. Sci..

[179]  Stanislaw Budkowski,et al.  An Introduction to Estelle: A Specification Language for Distributed Systems , 1987, Comput. Networks.

[180]  Lus Gomes,et al.  Behavioral Modeling for Embedded Systems and Technologies: Applications for Design and Implementation , 2009 .

[181]  Frank Slomka,et al.  An application-based EDF scheduler for OSEK/VDX , 2008, 2008 Design, Automation and Test in Europe.