The application of high-level languages to single-chip digital signal processors

Strategies leading to the efficient use of high-level languages (HLLs) on single-chip digital signal processors (DSPs) are discussed. The discussion progresses from the specification of a particular algorithm, through stepwise refinements, to an optimized implementation for the DSP. For the purpose of illustration, Texas Instruments' high-performance floating-point DSP (the TMS320C30) and its optimizing C compiler are used. The execution of general-purpose code is considered. The TMS320C30 and its optimizing C compiler combine to attain 10987 Dhrystones/s.<<ETX>>