Side-Channel Assisted Modeling Attacks on Feed-Forward Arbiter PUFs Using Silicon Data

Physically Unclonable Functions PUFs are used for generating unique signatures from the complex manufacturing variations in integrated circuits. However, the majority of PUFs have been shown to be vulnerable to modeling attacks. In this work, we take a closer look at the vulnerability of feed-forward arbiter PUFs towards a combined side-channel and modeling attack using data measured from our 32nm test chips. The side-channel information from the feed-forward PUF construction is used as a catalyst for improving the performance of modeling attacks. This hybrid attack helps to push the prediction accuracies to very high limits >98.5%, especially for larger PUF circuits. The hybrid attack yields around 7% improvement in prediction rates when compared to a conventional modeling attack mounted under the presence of error-inflicted challenge-response pairs.

[1]  Wayne P. Burleson,et al.  Hybrid modeling attacks on current-based PUFs , 2014, 2014 IEEE 32nd International Conference on Computer Design (ICCD).

[2]  Patrick Schaumont,et al.  A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions , 2011, IACR Cryptol. ePrint Arch..

[3]  Daniel E. Holcomb,et al.  Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers , 2009, IEEE Transactions on Computers.

[4]  Jeroen Delvaux,et al.  Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise , 2013, 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[5]  Marten van Dijk,et al.  A technique to build a secret key in integrated circuits for identification and authentication applications , 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).

[6]  Jeroen Delvaux,et al.  Fault Injection Modeling Attacks on 65 nm Arbiter and RO Sum PUFs via Environmental Changes , 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

[7]  Daniel E. Holcomb,et al.  Low-power sub-threshold design of secure physical unclonable functions , 2010, 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED).

[8]  Srinivas Devadas,et al.  PUF Modeling Attacks on Simulated and Silicon Data , 2013, IEEE Transactions on Information Forensics and Security.

[9]  Wayne P. Burleson,et al.  Hybrid side-channel/machine-learning attacks on PUFs: A new threat? , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[10]  Srinivas Devadas,et al.  Modeling attacks on physical unclonable functions , 2010, CCS '10.

[11]  Ulrich Rührmair,et al.  Combined Modeling and Side Channel Attacks on Strong PUFs , 2013, IACR Cryptol. ePrint Arch..

[12]  G. Edward Suh,et al.  Extracting secret keys from integrated circuits , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Dilip Kumar Krishnappa,et al.  Design and Validation of Arbiter-Based PUFs for Sub-45-nm Low-Power Security Applications , 2012, IEEE Transactions on Information Forensics and Security.

[14]  G. Edward Suh,et al.  Physical Unclonable Functions for Device Authentication and Secret Key Generation , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[15]  Georg T. Becker,et al.  Active and Passive Side-Channel Attacks on Delay Based PUF Designs , 2014, IACR Cryptol. ePrint Arch..