Modélisation, Analyse et Optimisation des Performances des Circuits Asynchrones Multi- Protocoles

[1]  Steve Furber,et al.  Principles of Asynchronous Circuit Design: A Systems Perspective , 2010 .

[2]  Laurent Fesquet,et al.  Oscillation period and power consumption in configurable self-timed ring oscillators , 2009, 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference.

[3]  Laurent Fesquet,et al.  Programmable/Stoppable Oscillator Based on Self-Timed Rings , 2009, 2009 15th IEEE Symposium on Asynchronous Circuits and Systems.

[4]  Marc Renaudin,et al.  Asynchronous Linear Pipelines: An efficient-optimal pipelining algorithm , 2008, 2008 15th IEEE International Conference on Electronics, Circuits and Systems.

[5]  M. Renaudin,et al.  Optimal asynchronous linear-pipelines , 2008, 2008 Ph.D. Research in Microelectronics and Electronics.

[6]  Marc Renaudin,et al.  AHMOSE: Towards a Circuit Level Solution for Process Variability , 2008 .

[7]  Marc Renaudin,et al.  Performance Modeling and Analysis of Asynchronous Linear-Pipeline with Time Variable Delays , 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

[8]  Steven M. Nowick,et al.  An efficient algorithm for time separation of events in concurrent systems , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

[9]  Robin Wilson,et al.  A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation , 2007, PATMOS.

[10]  B. Lasbouygues,et al.  Temperature and Voltage Aware Timing Analysis: Application to Voltage Drops , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[11]  Robin Wilson,et al.  Temperature- and Voltage-Aware Timing Analysis , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[12]  Seth Copen Goldstein,et al.  Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis , 2007, 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07).

[13]  Peter A. Beerel,et al.  Pipeline optimization for asynchronous circuits: complexity analysis and an efficient optimal algorithm , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[14]  Marc Renaudin,et al.  QDI Latches Characteristics and Asynchronous Linear-Pipeline Performance Analysis , 2006, PATMOS.

[15]  Edward G. Coffman,et al.  Efficient performance analysis of asynchronous systems based on periodicity , 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).

[16]  Christos P. Sotiriou,et al.  Controlling event spacing in self-timed rings , 2005, 11th IEEE International Symposium on Asynchronous Circuits and Systems.

[17]  Simon W. Moore,et al.  Analog micropipeline rings for high precision timing , 2004, 10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings..

[18]  Peter A. Beerel.  Asynchronous circuits: an increasingly practical design solution , 2002, Proceedings International Symposium on Quality Electronic Design.

[19]  Mark R. Greenstreet,et al.  An event spacing experiment , 2002, Proceedings Eighth International Symposium on Asynchronous Circuits and Systems.

[20]  Mark R. Greenstreet,et al.  Temporal Properties of Self-Timed Rings , 2001, CHARME.

[21]  Román Hermida,et al.  Optimization of asynchronous delay-insensitive pipeline latency using stage reorganization and optimal stage parameter estimation , 2001, Proceedings Second International Conference on Application of Concurrency to System Design.

[22]  Jo C. Ebergen.  Squaring the FIFO in GasP , 2001, Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001.

[23]  Jens Sparsø,et al.  Principles of Asynchronous Circuit Design , 2001 .

[24]  Peter A. Beerel,et al.  Bounding average time separations of events in stochastic timed Petri nets with choice , 1999, Proceedings. Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[25]  J. Ebergen,et al.  Response-time properties of linear asynchronous pipelines , 1999 .

[26]  Supratik Chakraborty,et al.  Min-max timing analysis and an application to asynchronous circuits , 1999, Proc. IEEE.

[27]  Steven M. Nowick,et al.  Scanning the Technology Applications of Asynchronous Circuits , 1999 .

[28]  Andrew M Lines,et al.  Pipelined Asynchronous Circuits , 1998 .

[29]  Ivan E. Sutherland,et al.  Predicting performance of micropipelines using Charlie diagrams , 1998, Proceedings Fourth International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[30]  Albert Koelmans,et al.  Petri Nets and Digital Hardware Design , 1998 .

[31]  Paul I. Pénzes,et al.  The design of an asynchronous MIPS R3000 microprocessor , 1997, Proceedings Seventeenth Conference on Advanced Research in VLSI.

[32]  Jo C. Ebergen,et al.  Response time properties of some asynchronous circuits , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[33]  Kenneth Y. Yun,et al.  Timing analysis for extended burst-mode circuits , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[34]  David L. Dill,et al.  More accurate polynomial-time min-max timing simulation , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[35]  Peter A. Beerel,et al.  Symbolic techniques for performance analysis of timed systems based on average time separation of events , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

[36]  Henrik Hulgaard.  Timing analysis and verification of timed asynchronous circuits , 1996 .

[37]  A. Semenov,et al.  Verification of asynchronous circuits using time Petri net unfolding , 1996, 33rd Design Automation Conference Proceedings, 1996.

[38]  Bill Lin,et al.  Efficient partial enumeration for timing analysis of asynchronous systems , 1996, DAC '96.

[39]  Paul Day,et al.  Four-phase micropipeline latch control circuits , 1996, IEEE Trans. Very Large Scale Integr. Syst..

[40]  A.L. Sangiovanni-Vincentelli,et al.  Synthesis of hazard-free asynchronous circuits with bounded wire delays , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[41]  David A. Edwards,et al.  Tools for validating asynchronous digital circuits , 1994, Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems.

[42]  Steven M. Burns,et al.  Bounded delay timing analysis of a class of CSP programs with choice , 1994, Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems.

[43]  Ted E. Williams.  Performance of iterative computation in self-timed rings , 1994, J. VLSI Signal Process..

[44]  Gaetano Borriello,et al.  Practical applications of an efficient time separation of events algorithm , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[45]  Gaetano Borriello,et al.  An algorithm for exact bounds on the time separation of events in concurrent systems , 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

[46]  Jens Sparsø,et al.  Delay-insensitive multi-ring structures , 1993, Integr..

[47]  Teresa H. Y. Meng,et al.  Synthesis of timed asynchronous circuits , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[48]  Ted Eugene Williams,et al.  Self-timed rings and their application to division , 1992 .

[49]  Steven Burns.  Performance Analysis and Optimization of Asynchronous Circuits , 1991 .

[50]  Ted Williams.  Latency and throughput tradeoffs in self-timed speed-independent pipelines and rings , 1990 .

[51]  T. Agerwala,et al.  Putting Petri nets to work , 1989 .

[52]  Tadao Murata,et al.  Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.

[53]  Tam-Anh Chu,et al.  Synthesis of self-timed VLSI circuits from graph-theoretic specifications , 1987 .

[54]  Alexandre Yakovlev,et al.  Signal Graphs: From Self-Timed to Timed Ones , 1985, PNPM.

[55]  C. V. Ramamoorthy,et al.  Performance Evaluation of Asynchronous Concurrent Systems Using Petri Nets , 1980, IEEE Transactions on Software Engineering.