Advanced VLSI circuit simulation using the BSIM

The BSIM plus model, a significantly enhanced version of the widely used BSIM (Berkeley short-channel insulated-gate FET model), is presented. The model uses a compact set of 21 parameters to provide accurate drain current expressions in sub-half-micron transistors. The performance of the model has been demonstrated on several common circuit building blocks, as well as in recently reported innovative circuits such as self-timed circuits. Simulation results on operational amplifier, DRAM (dynamic random-access memory), self-timed adder, and band-gap reference circuits are presented. The model has been implemented in modified versions of the SPICE circuit simulation program and SUXES parameter extraction program.