Low conduction loss and low device stress three-level power factor correction rectifier

A low conduction loss and low device stress three-level rectifier is proposed and the corresponding neutral-point voltage balance control scheme is presented in this study. Compared with the conventional rectifier, the MOSFET voltage rating can be reduced by half. The inductance and the volume of input inductor are reduced. The conduction losses can also be lowered because of the elimination of the front–end bridge rectifier and the adoption of synchronous rectification. The neutral-point voltage balance algorithm based on the average current-mode modulation is illustrated with constant frequency operation. To verify the theoretical analysis, a universal line input 100 kHz, 900 W prototype is built. The experimental results show that the input inductor volume is greatly reduced and the neutral-point voltage balance of the prototype is fulfilled considering various load conditions and dynamic processes. The proposed rectifier improves the efficiency by 2% under 90 V line input voltage compared with the conventional one.

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