A Triple-Mode Sigma-Delta Modulator Design for Wireless Standards

This work presents a triple-mode sigma-delta modulator for three wireless standards namely GSM/WCDMA and Bluetooth. A reconfigurable ADC has been used to meet the wide bandwidth and high dynamic range requirements of the multi-standard receivers with less power consumption. A highly linear sigma-delta ADC which has reduced sensitivity to circuit imperfections has been chosen in our design. This is particularly suitable for wide band applications where the oversampling ratio is low. Simulation results indicate that the modulator achieves a peak SNDR of 84/68/68 dB over a bandwidth of 0.2/3.84/1.5 MHz with an oversampling ratio 128/8/8 in GSM/WCDMA/Bluetooth modes respectively.

[1]  M. Ismail,et al.  A low power multi-standard sigma-delta ADC for WCDMA/GSM/Bluetooth applications , 2004, The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004..

[2]  Ling Zhang,et al.  A high order multi-bit /spl sigma//spl delta/ modulator for multi-standard wireless receiver , 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

[3]  A. Dezzani,et al.  A 1.2-V dual-mode WCDMA/GPRS /spl Sigma//spl Delta/ modulator , 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

[4]  Mohammed Ismail,et al.  A reconfigurable low IF-zero IF receiver architecture for multi-standard wide area wireless networks , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

[5]  Baher S. Haroun,et al.  18.1 A 1.5V 2.4/2.9mW 79/50dB DR Σ∆ Modulator for GSM/WCDMA in a 0.13µm Digital Process , 2002 .

[6]  T. Burger,et al.  A 13.5mW, 185 MSample/s /spl Delta//spl Sigma/-modulator for UMTS/GSM dual-standard IF reception , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[7]  Mohammed Ismail,et al.  Multi-Standard CMOS Wireless Receivers: Analysis and Design , 2002 .

[8]  G. Temes,et al.  Wideband low-distortion delta-sigma ADC topology , 2001 .

[9]  P. Kiss,et al.  Digital techniques for improved /spl Delta//spl Sigma/ data conversion , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[10]  Andrea Gerosa,et al.  A multi-mode /spl Sigma//spl Delta/ analog-to-digital converter for GSM, UMTS and WLAN , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[11]  Hyung-Joon Kim,et al.  A CMOS radio receiver architecture for ISM/UNII multi-standard wireless applications , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

[12]  Andrea Baschirotto,et al.  Behavioral modeling of switched-capacitor sigma-delta modulators , 2003 .

[13]  C. S. Petrie,et al.  A multi-bit sigma-delta ADC for multi-mode receivers , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[14]  Andrea Baschirotto,et al.  Modeling sigma-delta modulator non-idealities in SIMULINK(R) , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).