A 34 Mb 3.3 V serial flash EEPROM for solid-state disk applications

This 34 Mb 3.3 V serial flash EEPROM for solid state disk applications has on-board digitally-controlled power registers compatible to the existing serially-controlled command architecture. A bank of high-linearity current-referenced DACs with fast-slewing regulated supply buffers creates multiple internal voltage sources that are completely accessible (and measurable) by the dedicated external controller. Also, new to this design is a verify (VFY) function that operates simultaneously with programming (PGM) and eliminates the need for an iterative PGM/VFY sequence. The die is fabricated using a triple poly single metal twin well 0.55 /spl mu/m CMOS process with memory cell size of 2.1 /spl mu/m/sup 2/.

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[2]  C.W. Leung,et al.  Serial 9 Mb flash EEPROM for solid state disk applications , 1992, 1992 Symposium on VLSI Circuits Digest of Technical Papers.