Analysis and performance of a versatile CMOS neural circuit based on multi-nested approach

Hardware implementations of the multi-nested universal cellular neural networks (CNN) cell can provide a method of evaluating arbitrary Boolean functions with great performance. This paper examines, through layout and SPICE simulations, a novel neural circuit with two nests implemented in Austria Microsystems (AMS) 0.35 /spl mu/m CMOS technology. Our circuit is designed as reconfigurable cell and works as a multi-nested neuron, analog-to-digital converter, and random number generator cell. Specific applications for this circuit include random number generator, nonlinear analog-to-digital converter, sensor networks, micro-robotics, and so on- static and dynamic SPICE simulations results are shown and verify the model and functional capabilities of the neuron cell described in the paper (Dogaru et al., 2003).

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