Gettering Strategies for SOI Wafers

Gettering strategies for iron in silicon-on-insulator (SOI) wafers are discussed. The buried oxide layer in SOI wafers forms a diffusion barrier for transi tion metals and may substantially reduce the efficiency of traditional gettering techniques, such as int ernal gettering. It follows from the modeling results that at standard device processing temperatures one has to rely primarily on proximity gettering techniques, e.g., on heavily doped wells in the device a rea. In contrast, polysilicon might be a very efficient means for gettering in SOI wafers during high temperature anneals as our data indicate that iron segregates in polysilicon at temperatures above 1000 C.