Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms

This paper aims at introducing a complete methodology that allows to easily implement on an fpga a system specification by exploiting the capabilities of partial dynamic reconfiguration provided by the modern boards. In the resulting system, which includes a set of fixed components (such as a processor and a controller) as well as some reconfigurable area (which can be allotted to different tasks running concurrently and replaced independently of one another — thus possibly hiding reconfiguration times), reconfiguration is handled internally by the system, without the use of external hardware. In order to meet the software requirements of complex systems, the solution is provided with a porting of a real–time gnu/Linux os, μCLinux, which allows software processes to exploit a rich set of features, and with a Linux module that simplifies and enhances the handling of reconfiguration.

[1]  Gordon J. Brebner,et al.  A Virtual Hardware Operating System for the Xilinx XC6200 , 1996, FPL.

[2]  R. W. Taylor,et al.  A self-reconfiguring processor , 1993 .

[3]  Jim McManus,et al.  In-Circuit Partial Reconfiguration of RocketIO Attributes , 2004 .

[4]  Marco D. Santambrogio,et al.  Dynamic Reconfigurability in Embedded System Design , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[5]  Fadi J. Kurdahi,et al.  A framework for reconfigurable computing: task scheduling and context management , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[6]  Scott McMillan,et al.  A lightweight approach for embedded reconfiguration of FPGAs , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[7]  Nupur Gupta,et al.  Design Methodologies for Core-Based FPGA Designs , 1997 .

[8]  Martin Turner,et al.  An FPGA-based hardware accelerator for image processing , 1994 .

[9]  David E. Taylor,et al.  Generalized RAD Module Interface Specification of the Field-programmable Port eXtender (FPX) Version 2.0 , 2001 .

[10]  Neil W. Bergmann,et al.  Embedded Linux as a Platform for Dynamically Self-Reconfiguring Systems-on-Chip , 2004, ERSA.

[11]  Steven A. Guccione,et al.  Run-time parameterizable cores , 1999, FPGA '99.

[12]  John W. Lockwood,et al.  PARBIT: A Tool to Transform Bitfiles to Implement Partial Reconfiguration of Field Programmable Gate Arrays (FPGAs) , 2001 .

[13]  Dzung T. Hoang,et al.  Searching genetic databases on Splash 2 , 1993, [1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines.

[14]  J. Lockwood,et al.  Dynamic hardware plugins in an FPGA with partial run-time reconfiguration , 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

[15]  Fabrizio Ferrandi,et al.  A design methodology for dynamic reconfiguration: the Caronte architecture , 2005, 19th IEEE International Parallel and Distributed Processing Symposium.