Advances in PCB Routing

The increasing complexity of electronic systems has made PCB routing a difficult problem. A large amount of research effort has been dedicated to the study of this problem. In this paper, we provide an overview of recent research results on the PCB routing problem. We focus on the escape routing problem and the length-matching routing problem, which are the two most important problems in PCB routing. Other relevant works are also briefly introduced.

[1]  Martin D. F. Wong,et al.  B-escape: a simultaneous escape routing algorithm based on boundary routing , 2010, ISPD '10.

[2]  Muhammet Mustafa Ozdal,et al.  Simultaneous escape routing and layer assignment for dense PCBs , 2004, ICCAD 2004.

[3]  Martin D. F. Wong,et al.  Simultaneous Escape-Routing Algorithms for Via Minimization of High-Speed Boards , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Tan Yan,et al.  BSG-Route: a length-matching router for general topology , 2008, ICCAD 2008.

[5]  Zhi-Wei Chen,et al.  Two-sided single-detour untangling for bus routing , 2010, Design Automation Conference.

[6]  Atsushi Takahashi,et al.  CAFE Router: A Fast Connectivity Aware Multiple Nets Routing Algorithm for Routing Grid with Obstacles , 2010 .

[7]  Martin D. F. Wong,et al.  A Length-Matching Routing Algorithm for High-Performance Printed Circuit Boards , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[8]  Atsushi Takahashi,et al.  Routability driven modification method of monotonic via assignment for 2-layer Ball Grid Array packages , 2008, 2008 Asia and South Pacific Design Automation Conference.

[9]  Tan Yan,et al.  A correct network flow model for escape routing , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[10]  Hui Kong,et al.  Optimal simultaneous pin assignment and escape routing for dense PCBs , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

[11]  Atsushi Takahashi,et al.  A global routing method for 2-layer ball grid array packages , 2005, ISPD '05.

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[13]  Martin D. F. Wong,et al.  On using SAT to ordered escape problems , 2009, 2009 Asia and South Pacific Design Automation Conference.

[14]  Evangeline F. Y. Young,et al.  A provably good approximation algorithm for Rectangle Escape Problem with application to PCB routing , 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

[15]  Atsushi Takahashi,et al.  Monotonic parallel and orthogonal routing for single-layer ball grid array packages , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[16]  Hui Kong,et al.  Optimal layer assignment for escape routing of buses , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

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[19]  Hui Kong,et al.  An optimal algorithm for finding disjoint rectangles and its application to PCB routing , 2010, Design Automation Conference.

[20]  Muhammet Mustafa Ozdal,et al.  A provably good algorithm for high performance bus routing , 2004, ICCAD 2004.

[21]  Hui Kong,et al.  Optimal bus sequencing for escape routing in dense PCBs , 2007, ICCAD 2007.

[22]  Yao-Wen Chang,et al.  An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design , 2007, 2007 44th ACM/IEEE Design Automation Conference.

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[27]  Zhi-Wei Chen,et al.  Obstacle-aware length-matching bus routing , 2011, ISPD '11.

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[29]  Martin D. F. Wong,et al.  BSG-Route: A Length-Constrained Routing Scheme for General Planar Topology , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[30]  Evangeline F. Y. Young,et al.  An optimal algorithm for layer assignment of bus escape routing on PCBs , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

[31]  Muhammet Mustafa Ozdal,et al.  Length-Matching Routing for High-Speed Printed Circuit Boards , 2003, ICCAD 2003.

[32]  Yao-Wen Chang,et al.  A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

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[39]  Yao-Wen Chang,et al.  An Efficient Pre-Assignment Routing Algorithm for Flip-Chip Designs , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

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