Variable length code decoder

MPEG 1, is has been proposed a variable length code decoder to provide a high-quality in systems, such as MPEG 2, or HDTV. The variable length code decoder as the data is input through the multiplexer to the output latch select input data latch portion is inputted to the barrel shifter. The barrel shifter is shifted to right under the control of the code word length is stored in the decoding control unit by outputting data in a previous clock PLA PLA outputs the code word and the code word length. Therefore, it is possible to increase the speed of functional blocks reduces the maximum delay time existing in parts connecting the variable length code decoder and the peripheral circuit, it is possible to reduce the IC implementation area.