A Processor-Time-Minimal Systolic Array for Transitive Closure

Using a directed acyclic graph (DAG) model of algorithms, the authors focus on processor-time-minimal multiprocessor schedules: time-minimal multiprocessor schedules that use as few processors as possible. The Kung, Lo, and Lewis (KLL) algorithm for computing the transitive closure of a relation over a set of n elements requires at least 5n-4 parallel steps. As originally reported. their systolic array comprises n/sup 2/ processing elements. It is shown that any time-minimal multiprocessor schedule of the KLL algorithm's dag needs at least n/sup 2//3 processing elements. Then a processor-time-minimal systolic array realizing the KLL dag is constructed. Its processing elements are organized as a cylindrically connected 2-D mesh, when n=0 mod 3. When n not=0 mod 3, the 2-D mesh is connected as a torus. >

[1]  Dan I. Moldovan,et al.  Parallelism detection and transformation techniques useful for VLSI algorithms , 1985, J. Parallel Distributed Comput..

[2]  Sailesh K. Rao,et al.  Regular interactive algorithms and their implementations on processor arrays , 1986 .

[3]  Weijia Shang,et al.  Time Optimal Linear Schedules for Algorithms with Uniform Dependencies , 1991, IEEE Trans. Computers.

[4]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[5]  Marina C. Chen,et al.  The Generation of a Class of Multipliers: Synthesizing Highly Parallel Algorithms in VLSI , 1988, IEEE Trans. Computers.

[6]  Sanjay V. Rajopadhye,et al.  On Synthesizing Systolic Arrays from Recurrence Equations with Linear Dependencies , 1986, FSTTCS.

[7]  T. Kailath,et al.  Array architectures for iterative algorithms , 1987, Proceedings of the IEEE.

[8]  Benjamin W. Wah,et al.  The Design of Optimal Systolic Arrays , 1985, IEEE Transactions on Computers.

[9]  Jeffrey D Ullma.  Computational Aspects of VLSI , 1984 .

[10]  Jean-Marc Delosme,et al.  Optimization of Computation Time for Systolic Arrays , 1992, IEEE Trans. Computers.

[11]  G. G. Stokes.  "J." , 1890, The New Yale Book of Quotations.

[12]  Sanjay V. Rajopadhye,et al.  Systolic Array Synthesis by Static Analysis of Program Dependencies , 1987, PARLE.

[13]  V. van Dongen,et al.  Uniformization of linear recurrence equations: a step toward the automatic synthesis of systolic arrays , 1988, [1988] Proceedings. International Conference on Systolic Arrays.

[14]  Sun-Yuan Kung,et al.  Optimal Systolic Design for the Transitive Closure and the Shortest Path Problems , 1987, IEEE Transactions on Computers.

[15]  H. T. Kung,et al.  Direct VLSI Implementation of Combinatorial Algorithms , 1979 .

[16]  Viktor K. Prasanna,et al.  A Note on the Linear Transformation Method for Systolic Array Design , 1990, IEEE Trans. Computers.

[17]  Thomas Kailath,et al.  Regular iterative algorithms and their implementation on processor arrays , 1988, Proc. IEEE.

[18]  Richard M. Karp,et al.  The Organization of Computations for Uniform Recurrence Equations , 1967, JACM.

[19]  Jose Antonio Baptista Fortes.  Algorithm transformations for parallel processing and vlsi architecture design , 1984 .

[20]  Stephen Warshall,et al.  A Theorem on Boolean Matrices , 1962, JACM.

[21]  P. Quinton.  Automatic synthesis of systolic arrays from uniform recurrent equations , 1984, ISCA 1984.

[22]  Alfred V. Aho,et al.  The Design and Analysis of Computer Algorithms , 1974 .

[23]  Marina C. Chen,et al.  A Design Methodology for Synthesizing Parallel Algorithms and Architectures , 1986, J. Parallel Distributed Comput..

[24]  Patrice Quinton,et al.  Synthesis of a New Systolic Architecture for the Algebraic Path Problem , 1990, Sci. Comput. Program..

[25]  Christos H. Papadimitriou,et al.  A Communication-Time Tradeoff , 1987, SIAM J. Comput..

[26]  PEIZONG LEE,et al.  Synthesizing Linear Array Algorithms from Nested For Loop Algorithms , 2015, IEEE Trans. Computers.

[27]  D.I. Moldovan,et al.  On the design of algorithms for VLSI systolic arrays , 1983, Proceedings of the IEEE.

[28]  Dan I. Moldovan,et al.  On the Analysis and Synthesis of VLSI Algorithms , 1982, IEEE Transactions on Computers.