A 0.4-V UWB baseband processor

A 0.4-V UWB digital baseband processor has been fabricated in a standard-VT 90-nm CMOS technology. The base-band processor operates at an ultra-low supply voltage to reduce energy consumption and utilizes a highly parallelized architecture to meet throughput constraints. While ultra-low voltage operation is usually limited to low energy, low performance applications, this work examines how it can be applied to low energy, high performance applications. Measured results for a 20-pJ/bit 100-Mbps UWB baseband processor are presented. Architectural techniques and design methodologies for reducing additional complexity due to parallelism are discussed.

[1]  Brian P. Ginsburg,et al.  Dual scalable 500MS/s, 5b time-interleaved SAR ADCs for UWB applications , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[2]  Anuj Batra,et al.  Multi-band OFDM Physical Layer Proposal , 2003 .

[3]  Anantha Chandrakasan,et al.  An Energy Efficient Sub-Threshold Baseband Processor Architecture for Pulsed Ultra-Wideband Communications , 2006, 2006 IEEE International Conference on Acoustics Speech and Signal Processing Proceedings.

[4]  Marian Verhelst,et al.  System design of an ultra-low power, low data rate, pulsed UWB receiver in the 0-960 MHz band , 2005, IEEE International Conference on Communications, 2005. ICC 2005. 2005.

[5]  A.P. Chandrakasan,et al.  A baseband processor for impulse ultra-wideband communications , 2005, IEEE Journal of Solid-State Circuits.

[6]  Chia-Hsiang Yang,et al.  A 1.2V 6.7mW impulse-radio UWB baseband transceiver , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[7]  Jan M. Rabaey,et al.  Low power synchronization for wireless sensor network modems , 2005, IEEE Wireless Communications and Networking Conference, 2005.

[8]  Dharma P. Agrawal,et al.  Optimal packet size in error-prone channel for IEEE 802.11 distributed coordination function , 2004, 2004 IEEE Wireless Communications and Networking Conference (IEEE Cat. No.04TH8733).

[9]  Anantha Chandrakasan,et al.  Characterizing and modeling minimum energy operation for subthreshold circuits , 2004, Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758).

[10]  Anantha Chandrakasan,et al.  Architectures for energy-aware impulse UWB communications , 2005, Proceedings. (ICASSP '05). IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005..

[11]  Brian P. Ginsburg,et al.  System design considerations for ultra-wideband communication , 2005, IEEE Communications Magazine.

[12]  Anantha Chandrakasan,et al.  A BiCMOS ultra-wideband 3.1-10.6GHz front-end , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[13]  Raúl Blázquez-Fernández Ultra-wideband digital baseband , 2006 .

[14]  B.P. Ginsburg,et al.  A 3.1 to 10.6 GHz 100 Mb/s Pulse-Based Ultra-Wideband Radio Receiver Chipset , 2006, 2006 IEEE International Conference on Ultra-Wideband.