VLSI Process modeling—SUPREM III

Over the past several years, the process-simulation tool SUPREM II has proven useful in the design and optimization of both bipolar and MOS technologies. This paper describes a new and significantly more capable version of the program--SUPREM III--which incorporates process models suitable for VLSI device design. This new version of the program is now generally available and should provide a powerful new tool in VLSI design. For the first time, the program models multilayer structures (up to five material layers). It also incorporates substantially upgraded diffusion, oxidation, ion implantation, and other process models. These models incorporate, where possible, recent thinking about underlying physical mechanisms. The program remains a one-dimensional simulator; extensions to two dimensions are discussed. This paper concentrates on the process models and their underlying physics; implementation issues are addressed elsewhere.

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