Solving Games Using Incremental Induction

Recently, IC3 has been presented as a new algorithm for formal verification. Based on incremental induction, it is often much faster compared to otherwise used fixpoint-based model checking algorithms. In this paper, we use the idea of incremental induction for solving two-player concurrent games. While formal verification requires to prove that a given system satisfies a given specification, game solving aims at automatically synthesizing a system to satisfy the specification. This involves both universal (player 1) and existential quantification (player 2) over the formulas that represent state transitions. Hence, algorithms for solving games are usually implemented with BDD packages that offer both kinds of quantification. In this paper, we show how to compute a solution of games by using incremental induction.

[1]  F. Somenzi Binary Decision Diagrams , 1999 .

[2]  Kavita Ravi,et al.  A Hybrid Algorithm for LTL Games , 2008, VMCAI.

[3]  Christoph Scholl,et al.  Approximate Symbolic Model Checking for Incomplete Designs , 2004, FMCAD.

[4]  Viktor Schuppan,et al.  RATSY - A New Requirements Analysis Tool with Synthesis , 2010, CAV.

[5]  Aaron R. Bradley,et al.  SAT-Based Model Checking without Unrolling , 2011, VMCAI.

[6]  Karem A. Sakallah,et al.  Theory and Applications of Satisfiability Testing - SAT 2011 - 14th International Conference, SAT 2011, Ann Arbor, MI, USA, June 19-22, 2011. Proceedings , 2011, SAT.

[7]  Mikolás Janota,et al.  Abstraction-Based Algorithm for 2QBF , 2011, SAT.

[8]  Manfred Broy,et al.  Calculational system design , 1999 .

[9]  Thomas Wilke,et al.  Automata Logics, and Infinite Games , 2002, Lecture Notes in Computer Science.

[10]  Aaron R. Bradley,et al.  IC3 and beyond: Incremental, Inductive Verification , 2012, CAV.

[11]  Mohamed Nassim Seghir,et al.  A Lightweight Approach for Loop Summarization , 2011, ATVA.

[12]  Sheldon B. Akers,et al.  Binary Decision Diagrams , 1978, IEEE Transactions on Computers.

[13]  Jean-François Raskin,et al.  Compositional Algorithms for LTL Synthesis , 2010, ATVA.

[14]  Kousha Etessami,et al.  Analysis of Recursive Game Graphs Using Data Flow Equations , 2004, VMCAI.

[15]  Bernd Finkbeiner,et al.  Bounded synthesis , 2007, International Journal on Software Tools for Technology Transfer.

[16]  Amir Pnueli,et al.  Specify, Compile, Run: Hardware from PSL , 2007, COCV@ETAPS.

[17]  Kenneth L. McMillan,et al.  Interpolation and SAT-Based Model Checking , 2003, CAV.

[18]  Roderick Bloem,et al.  Optimizations for LTL Synthesis , 2006, 2006 Formal Methods in Computer Aided Design.

[19]  Assaf Schuster,et al.  Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis , 2004, FMCAD.

[20]  Robert K. Brayton,et al.  Efficient implementation of property directed reachability , 2011, 2011 Formal Methods in Computer-Aided Design (FMCAD).

[21]  Armin Biere,et al.  Symbolic Model Checking without BDDs , 1999, TACAS.