ELECTRICAL PROPERTIES OF LPCVD POLYSILICON DEPOSITED IN THE VICINITY OF AMORPHOUS - POLYCRYSTALLINE PHASE

Using dark d.c. electrical measurements, the electrical properties of LPCVD polysilicon deposited at 570 °C and 620 °C are studied. The grain boundaries are assumed to be described with disordered material and applying the Mott's theory, the density of states near the Fermi level was determined, obtaining the values 3.78⋅10 18 cm -3 and 1.40⋅10 18 cm -3 for the samples deposited at low temperature and for those deposited at 620 °C, respectively. Various behaviours are found if the samples are annealed. After annealing the samples deposited at 570 °C prove an increasing of the amorphous component represented by the grain boundaries, while for samples deposited at 620 °C the same annealing process produces an increase of the crystalline part. The super-coordination defects produced and the passivation effects given by the annealing in hydrogen atmosphere are used to explain these transformations. The conduction mechanism is controlled by the grain boundaries's properties. Polycrystalline -silicon (polysilicon) films obtained by chemical vapour deposition are used in a wide variety of VLSI applications requiring very different electrical properties. The undoped and light doped layers show a high resistivity and are used in the fabrication of the high - value load resistors for static RAM cells memory. The highly doped polysilicon films are characterised by a low resistivity, but limited by the amount of the dopant that can be incorporated in substitutional site in the grains. Due to its electrical and optical properties, the polycrystalline silicon is used in many applications as: i) in integrated circuit technology as passive elements, ii) in large-area liquid crystal displays as thin film transistors (TFT) used as switching elements, iii) in the solar cells technology as performant material to produce solar cells with high conversion efficiency and low- cost, etc. The polysilicon structure, represented by size and number of the crystalline grains, has a great influence on the physical properties of the material. Thus, the resistivity is related to the grain boundaries and by controlling the number of grain boundaries or their electrical activity it can modify the electrical properties of such kind of layers. There are studies on LPCVD polysilicon films prepared from silane where the correlation between crystalline structure and deposition parameters is established. Thus, the temperature, deposition pressure, deposition rate and the dopant determine the polysilicon grain structure (1-3). In this paper we study the electrical properties of undoped LPCVD polycrystalline silicon deposited at 570 °C and 620 °C. It is shown by Hasataka (4) that the deposition temperature 580°C is a demarcation limit between the amorphous phase and polycrystalline phase. This temperature value should be understood as one depending also to other deposition parameters. In order to understand the structural differences of these two depositions, we have studied both the as deposited and annealed samples's states. The annealing of the samples has a major effect on the grains size and electrical properties.