A case for digit serial VLSI signal processors
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[1] Mary Jane Irwin,et al. Digit-Pipelined Arnthmetic as Illustrated by the Paste-Up System: A Tutorial , 1987, Computer.
[2] Stewart Smith,et al. Serial-Data Computation , 1987 .
[3] Mary Jane Irwin,et al. A comparison of two digit serial VLSI adders , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.
[4] Mary Jane Irwin,et al. A digit pipelined dynamic time warp processor [word recognition] , 1988, IEEE Trans. Acoust. Speech Signal Process..
[5] Mary Jane Irwin,et al. A Digit Pipelined Dynamic Time Warp Processor , 1986 .
[6] A. Avizeinis,et al. Signed Digit Number Representations for Fast Parallel Arithmetic , 1961 .
[7] Charles E. Leiserson,et al. Optimizing synchronous systems , 1981, 22nd Annual Symposium on Foundations of Computer Science (sfcs 1981).
[8] Algirdas Avizienis,et al. Signed-Digit Numbe Representations for Fast Parallel Arithmetic , 1961, IRE Trans. Electron. Comput..
[9] Peter B. Denyer,et al. VLSI Signal Processing: A Bit-Serial Approach , 1985 .
[10] Peter F. Corbett,et al. A digital-serial silicon compiler , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..
[11] H. T. Kung,et al. Systolic Arrays for (VLSI). , 1978 .
[12] Mary Jane Irwin,et al. Being Stingy with Multipliers , 1990, IEEE Trans. Computers.
[13] Keshab K. Parhi,et al. Look-ahead computation: Improving iteration bound in linear recursions , 1987, ICASSP '87. IEEE International Conference on Acoustics, Speech, and Signal Processing.
[14] S. C. Knowles,et al. Bit-level systolic arrays for IIR filtering , 1988, [1988] Proceedings. International Conference on Systolic Arrays.
[15] Gernot Metze,et al. Elimination of carry propagation in digital computers , 1959, IFIP Congress.
[16] Naofumi Takagi,et al. Design of high speed MOS multiplier and divider using redundant binary representation , 1987, 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH).
[17] Tony M. Carter. Structured arithmetic tiling of integrated circuits , 1987, 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH).
[18] M. Andrews. A systolic SBNR adaptive signal processor , 1986 .
[19] S.G. Smith,et al. Advanced Serial-Data Computation , 1988, J. Parallel Distributed Comput..
[20] Mary Jane Irwin,et al. An Overview of the Penn State Design System , 1987, 24th ACM/IEEE Design Automation Conference.
[21] Mary Jane Irwin,et al. The Arithmetic Cube , 1987, IEEE Transactions on Computers.
[22] Mary Jane Irwin,et al. Mesh Arrays and Logician: A Tool for Their Efficient Generation , 1987, 24th ACM/IEEE Design Automation Conference.
[23] Roger Woods,et al. Systolic IIR filters with bit level pipelining , 1988, ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing.
[24] Mary Jane Irwin,et al. Online pipeline systems for recursive numeric computations , 1980, ISCA '80.