1993 International Conference on Parallel Processing A Generational Algorithm to Multiprocessor Cache Coherence

In view of the growing gap between processor speeds and net¬ work latency, it becomes increasingly expensive to maintain multi-processor cache consistency via run-time inter¬ processor communication. Software-Controlled cache coher¬ ence schemes have the advantage of simplified hardware and the reduction of inter-processor communication traffic. Among previously proposed software-based schemes, those based on the concept of version/timestamp show the most aggressive performance potential. Unfortunately these methods have several implementation and performance prob¬ lems that prevent them from being practical implementation choices. In this paper, we discuss these problems and describe a generational cache coherence algorithm that elim¬ inates all of these problems. Moreover, the new algorithm can exploit inter-level temporal locality of parallel programs with significantly less hardware support.