Temporary wafer bonding defect impact assessment on substrate thinning: Process enhancement through systematic defect track down
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E. Beyne | A. Jourdain | S. Suhard | A. Phommahaxay | B. Swinnen | W. Spiess | A. Jourdain | G. Beyer | E. Beyne | B. Swinnen | A. Phommahaxay | P. Bex | J. Pancken | A. Miller | G. Verbinnen | S. Suhard | G. Beyer | M. Lismont | P. Bex | A. Miller | G. Verbinnen | J. Pancken | A. Van den Eede | T. Woitke | P. Bisson | W. Spiess | T. Woitke | P. Bisson | A. Van den Eede | M. Lismont
[1] Eric Beyne,et al. Ultrathin wafer handling in 3D Stacked IC manufacturing combining a novel ZoneBOND™ temporary bonding process with room temperature peel debonding , 2012, 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International.
[2] A. Jourdain,et al. Integration of TSVs, wafer thinning and backside passivation on full 300mm CMOS wafers for 3D applications , 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).