Efficient transient simulation for transistor-level analysis

In this paper, we introduce an efficient transistor level simulation tool with SPICE-accuracy for deep-submicron (DSM) VLSI circuits with strong coupling effects. The new approach uses multigrid for large networks of power/ground, clock and signal interconnect. Transistor devices are integrated using a novel two-stage Newton-Raphson method to dynamically model the linear network and nonlinear devices interface. Orders of magnitude speedup over Berkeley SPICE3 is observed for sets of DSM design circuits.

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