Parallel Architectures and Algorithms for Image Component Labeling

A survey and a characterization of the various parallel algorithms and architectures developed for the problem of labeling digitized images over the last two decades are presented. It is shown that four basic parallel techniques underly the various parallel algorithms for this problem. However, because most of these techniques have been developed at a theoretical level, it is still not clear which techniques are most efficient in practical terms. Parallel architectures and parallel models of computation that implement these techniques are also studied. >

[1]  John R. Kender,et al.  Low-Level Image Analysis Tasks on Fine-Grained Tree-Structured SIMD Machines , 1987, J. Parallel Distributed Comput..

[2]  Stephen B. Gray,et al.  Local Properties of Binary Images in Two Dimensions , 1971, IEEE Transactions on Computers.

[3]  Ajit Agrawal,et al.  A Parallel O(log N) Algorithm for Finding Connected Components In Planar Images , 1987, ICPP.

[4]  Marvin Minsky,et al.  Perceptrons: An Introduction to Computational Geometry , 1969 .

[5]  Kendall Preston,et al.  Cellular Logic Computers for Pattern Recognition , 1983, Computer.

[6]  Steven L. Tanimoto,et al.  A hierarchical cellular logic for pyramid computers , 1984, J. Parallel Distributed Comput..

[7]  Jorge L. C. Sanz,et al.  Machine Vision Algorithms for Automated Inspection Thin-Film Disk Heads , 1988, IEEE Trans. Pattern Anal. Mach. Intell..

[8]  Azriel Rosenfeld,et al.  Parallel Image Processing by Memory-Augmented Cellular Automata , 1981, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[9]  Lynn Conway,et al.  Introduction to VLSI systems , 1978 .

[10]  F. Leighton New lower bound techniques for VLSI , 1981, 22nd Annual Symposium on Foundations of Computer Science (sfcs 1981).

[11]  Viktor K. Prasanna,et al.  An efficient VLSI architecture with applications to geometric problems , 1989, Parallel Comput..

[12]  Ashok K. Agrawala,et al.  A sequential approach to the extraction of shape features , 1977 .

[13]  James Christopher Wyllie,et al.  The Complexity of Parallel Computations , 1979 .

[14]  H. M. Alnuweiri,et al.  Optimal image computations on reduced VLSI architectures , 1989 .

[15]  C. Thomborson,et al.  Area-time complexity for VLSI , 1979, STOC.

[16]  Alfred V. Aho,et al.  The Design and Analysis of Computer Algorithms , 1974 .

[17]  Narendra Ahuja,et al.  Multiprocessor Pyramid Architectures for Bottom-Up Image Analysis , 1984, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[18]  Kenneth E. Batcher,et al.  Design of a Massively Parallel Processor , 1980, IEEE Transactions on Computers.

[19]  Mikhail J. Atallah,et al.  Solving tree problems on a mesh-connected processor array , 1985, 26th Annual Symposium on Foundations of Computer Science (sfcs 1985).

[20]  Sartaj Sahni,et al.  Finding Connected Components and Connected Ones on a Mesh-Connected Parallel Computer , 1980, SIAM J. Comput..

[21]  Harold S. Stone,et al.  Parallel Processing with the Perfect Shuffle , 1971, IEEE Transactions on Computers.

[22]  Viktor K. Prasanna,et al.  A VLSI-Based Multiprocessor Architecture for Implementing Parallel Algorithms , 1985, International Conference on Parallel Processing.

[23]  Azriel Rosenfeld,et al.  Connectivity in Digital Pictures , 1970, JACM.

[24]  Xue Dong Yang,et al.  Design of fast connected components hardware , 2011, Proceedings CVPR '88: The Computer Society Conference on Computer Vision and Pattern Recognition.

[25]  Hanan Samet,et al.  Efficient Component Labeling of Images of Arbitrary Dimension Represented by Linear Bintrees , 1988, IEEE Trans. Pattern Anal. Mach. Intell..

[26]  S. Rao Kosaraju,et al.  Fast parallel processing array algorithms for some graph problems(Preliminary Version) , 1979, STOC.

[27]  S. H. Unger,et al.  A Computer Oriented toward Spatial Problems , 1899, Proceedings of the IRE.

[28]  H. Coxeter,et al.  Introduction to Geometry. , 1961 .

[29]  Michael D. Howard,et al.  HBA Vision Architecture: Built and Benchmarked , 1989, IEEE Trans. Pattern Anal. Mach. Intell..

[30]  Viktor K. Prasanna,et al.  Optimal VLSI Sorting with Reduced Number of Processors , 1991, IEEE Trans. Computers.

[31]  Viktor K. Prasanna,et al.  Optimal geometric algorithms on fixed-size linear arrays and scan line arrays , 1988, Proceedings CVPR '88: The Computer Society Conference on Computer Vision and Pattern Recognition.

[32]  Ahmed Sameh,et al.  The Illiac IV system , 1972 .

[33]  Sartaj Sahni,et al.  Parallel permutation and sorting algorithms and a new generalized connection network , 1982, JACM.

[34]  KSHITIJ A. DOSHI,et al.  Optimal Graph Algorithms on a Fixed-Size Linear Array , 1987, IEEE Transactions on Computers.

[35]  K. Wojtek Przytula,et al.  Fast Fourier Transform Algorithm For Two-Dimensional Array Of Processors , 1988, Optics & Photonics.

[36]  Uzi Vishkin,et al.  An O(n² log n) Parallel MAX-FLOW Algorithm , 1982, J. Algorithms.

[37]  W. Beyer RECOGNITION OF TOPOLOGICAL INVARIANTS BY ITERATIVE ARRAYS , 1969 .

[38]  H. T. Kung,et al.  The Warp Computer: Architecture, Implementation, and Performance , 1987, IEEE Transactions on Computers.

[39]  Jorge L. C. Sanz,et al.  P3E: New Life for Projection-Based Image Processing , 1987, J. Parallel Distributed Comput..

[40]  Chul E. Kim On the Cellular Convexity of Complexes , 1981, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[41]  Dionysios I. Reisis,et al.  Image Computations on Meshes with Multiple Broadcast , 1989, IEEE Trans. Pattern Anal. Mach. Intell..

[42]  Sartaj Sahni,et al.  Data broadcasting in SIMD computers , 1981, IEEE Transactions on Computers.

[43]  Hans Jürgen Halin,et al.  The ETH-Multiprocessor Empress: A Dynamically Configurable MIMD System , 1982, IEEE Transactions on Computers.

[44]  Dhabaleswar K. Panda,et al.  OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses , 1990, ICS '90.

[45]  Allan Borodin,et al.  Routing, Merging, and Sorting on Parallel Models of Computation , 1985, J. Comput. Syst. Sci..

[46]  Renato Stefanelli,et al.  PAPIA: Pyramidal architecture for parallel image analysis , 1985, 1985 IEEE 7th Symposium on Computer Arithmetic (ARITH).

[47]  Gary L. Miller,et al.  Deterministic Parallel List Ranking , 1988, AWOC.

[48]  Azriel Rosenfeld,et al.  Sequential Operations in Digital Picture Processing , 1966, JACM.

[49]  Viktor K. Prasanna,et al.  Parallel Geometric Algorithms for Digitized Pictures on Mesh of Trees , 1986, ICPP.

[50]  Allan L. Fisher Scan line array processors for image computation , 1986, ISCA 1986.

[51]  Russ Miller,et al.  Meshes with reconfigurable buses , 1988 .

[52]  Robert E. Tarjan,et al.  Efficiency of a Good But Not Linear Set Union Algorithm , 1972, JACM.

[53]  James J. Little,et al.  Algorithmic Techniques for Computer Vision on a Fine-Grained Parallel Machine , 1989, IEEE Trans. Pattern Anal. Mach. Intell..

[54]  Azriel Rosenfeld,et al.  Parallel Image Processing Using Cellular Arrays , 1983, Computer.

[55]  David L. Milgram,et al.  Region extraction using convergent evidence , 1979 .

[56]  Terry J. Fountain,et al.  Cellular logic image processing , 1986 .

[57]  Linda G. Shapiro,et al.  A new connected components algorithm for virtual memory computers , 1983, Comput. Vis. Graph. Image Process..

[58]  Robert E. Tarjan,et al.  Finding Biconnected Components and Computing Tree Functions in Logarithmic Parallel Time (Extended Summary) , 1984, FOCS.

[59]  Stefano Levialdi,et al.  On shrinking binary picture patterns , 1972, CACM.

[60]  Kai Hwang,et al.  An Orthogonal Multiprocessor for Parallel Scientific Computations , 1989, IEEE Trans. Computers.

[61]  Yiming Ma,et al.  Analysis and Applications of the Orthogonal Access Multiprocessor , 1989, J. Parallel Distributed Comput..

[62]  G. Grant,et al.  An efficient algorithm for boundary tracing and feature extraction , 1981 .

[63]  Hanan Samet,et al.  Connected Component Labeling Using Quadtrees , 1981, JACM.

[64]  D. Parkinson,et al.  The AMT DAP 500 , 1988, Digest of Papers. COMPCON Spring 88 Thirty-Third IEEE Computer Society International Conference.

[65]  Narendra Ahuja,et al.  Multiprocessor pyramids for bottom-up image analysis , 1982 .

[66]  Sartaj Sahni,et al.  Optimal BPC Permutations on a Cube Connected SIMD Computer , 1982, IEEE Transactions on Computers.

[67]  Jorge L. C. Sanz,et al.  Hypercube and Shuffle-Exchange Algorithms for Image Component Labeling , 1987, J. Algorithms.

[68]  T. J. Fountain,et al.  Processor Arrays: Architecture and Applications , 1987 .

[69]  Russ Miller,et al.  Data Movement Techniques for the Pyramid Computer , 1987, SIAM J. Comput..

[70]  Uzi Vishkin,et al.  An O(log n) Parallel Connectivity Algorithm , 1982, J. Algorithms.

[71]  Dionysios I. Reisis,et al.  VLSI Arrays with Reconfigurable Buses , 1988, ICS.

[72]  Jorge L. C. Sanz,et al.  An EREW PRAM Algorithm for Image Component Labeling , 1989, IEEE Trans. Pattern Anal. Mach. Intell..

[73]  Russ Miller,et al.  Geometric Algorithms for Digitized Pictures on a Mesh-Connected Computer , 1985, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[74]  Jorge L. C. Sanz,et al.  Algorithms for Image Component Labeling on SIMD Mesh-Connected Computers , 1987, IEEE Trans. Computers.

[75]  M. H. Schultz,et al.  Topological properties of hypercubes , 1988, IEEE Trans. Computers.

[76]  Jeffrey D Ullma Computational Aspects of VLSI , 1984 .

[77]  Massimo Maresca,et al.  Polymorphic-Torus Architecture for Computer Vision , 1989, IEEE Trans. Pattern Anal. Mach. Intell..

[78]  S. N. Maheshwari,et al.  Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees , 1983, IEEE Transactions on Computers.

[79]  Robert Michael Owens,et al.  An architecture for a VLSI FFT processor , 1983, Integr..

[80]  Viktor K. Prasanna,et al.  Fast Image Labeling Using Local Operators on Mesh-Connected Computers , 1991, IEEE Trans. Pattern Anal. Mach. Intell..