Integration of LPCVD-SiNx gate dielectric with recessed-gate E-mode GaN MIS-FETs: Toward high performance, high stability and long TDDB lifetime

By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiN<inf>x</inf> gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (V<inf>th</inf> ∼ +2.37 V @ I<inf>d</inf> = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiN<inf>x</inf>/GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI).