Wide input voltage range high power density high efficiency 10 kW three-phase three-level unity power factor PWM rectifier

In this paper the current stresses on the power components of a direct three-phase boost-type unity power factor rectifier are analysed in order to provide a basis for a system design under restriction of the height to 2-U. The conduction losses of the power semiconductors are calculated using analytical approximations of the average and RMS values of the component currents. The switching losses are taken from experimental investigations where a novel turn-on snubber has been employed. Based on this data an overview of the estimated power losses is given for a rectifier system of 10.5 kW/800 VDC output for 320 V/400 V/480 V/530 V (RMS, line-to-line) mains voltage. Corresponding efficiency figures are calculated and the improvement achieved by the turn-on snubber as compared to hard switching is determined. The snubber topology and operating principle is discussed in detail. Finally, the theoretical results are verified by experimental investigation of a system prototype.

[1]  JOHANN MINIBÖCK,et al.  Experimental Analysis of the Application of Latest SiC Diode and CoolMOS Power Transistor Technology in a 10 kW Three-Phase PWM ( VIENNA ) Rectifier , .

[2]  Johann W. Kolar,et al.  Evaluation of a Delta-Connection of Three Single-Phase Unity Power Factor Rectifier Systems (Delta-Rectifier) in Comparison to a Direct Three-Phase Rectifier Realization. Part I - Modulation Schemes and Input Current Ripple , 2001 .

[3]  J. Minibock,et al.  Comparative theoretical and experimental evaluation of bridge leg topologies of a three-phase three-level unity power factor rectifier , 2001, 2001 IEEE 32nd Annual Power Electronics Specialists Conference (IEEE Cat. No.01CH37230).

[4]  K. Wallace,et al.  Diode recovery current suppression circuit , 2000, INTELEC. Twenty-Second International Telecommunications Energy Conference (Cat. No.00CH37131).

[5]  Johann W. Kolar,et al.  A novel three-phase utility interface minimizing line current harmonics of high-power telecommunications rectifier modules , 1994, Proceedings of Intelec 94.

[6]  J. Minibock,et al.  A novel concept for mains voltage proportional input current shaping of a VIENNA rectifier eliminating controller multipliers. I. Basic theoretical considerations and experimental verification , 2001, APEC 2001. Sixteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.01CH37181).

[7]  Johann W. Kolar,et al.  A Novel 10kW 2-U Three-Phase Unity Power Factor Rectifier Module , 2001 .

[8]  D. Shonts.  Improved PFC boost choke using a quasi-planar winding configuration , 1999, APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285).

[9]  Johann W. Kolar,et al.  Design and experimental investigation of a three-phase high power density high efficiency unity power factor PWM (VIENNA) rectifier employing a novel integrated power semiconductor module , 1996, Proceedings of Applied Power Electronics Conference. APEC '96.

[10]  U. Drofenik,et al.  A new concept for minimizing high-frequency common-mode EMI of three-phase PWM rectifier systems keeping high utilization of the output voltage , 2000, APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058).

[11]  Yifan Zhao,et al.  Force Commutated Three Level Boost Type Rectifier , 1993, IEEE Transactions on Industry Applications.