A 4.75GHz fractional frequency divider with digital spur calibration in 45nm CMOS

Local-oscillator (LO) pulling is a typical issue in fully integrated transceivers. To offset the oscillator frequency from the PA output frequency, SSB mixing or division-by-2 is typically used [1]. However, the first might require additional filtering to remove mixing spurs and the latter is still sensitive to second-harmonic pulling. The divider described in this paper prevents LO pulling by introducing a fractional ratio between input and output frequencies. Since fractional spurs are suppressed by digital calibration, no additional filtering is required, removing inductors and saving silicon area.

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