Hardware realization of residue number system algorithms by Boolean functions minimization

Residue number systems (RNS) represent numbers by their remainders modulo a set of relatively prime numbers. This paper pro- poses an efficient hardware implementation of modular multiplication and of the modulo function (X(mod P)), based on Boolean minimiza- tion. We report experiments showing a performance advantage up to 30 times for our approach vs. the results obtained by state-of-art industrial tools.

[1]  Reto Zimmermann,et al.  Efficient VLSI implementation of modulo (2/sup n//spl plusmn/1) addition and multiplication , 1999, Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336).

[2]  P. L. Montgomery.  Modular multiplication without trial division , 1985 .

[3]  P. Mohan.  Residue Number Systems , 2002 .

[4]  Berk Sunar,et al.  Low-Power Elliptic Curve Cryptography Using Scaled Modular Arithmetic , 2004, CHES.

[5]  L. Sousa,et al.  A universal architecture for designing efficient modulo 2/sup n/+1 multipliers , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[6]  Tsutomu Sasao,et al.  Fast Hardware Computation of x Mod z , 2011, 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum.

[7]  A. Omondi,et al.  Residue Number Systems: Theory and Implementation , 2007 .