as the size of the array is increased. Pipelining involves breaking an operation into a sequence of micro-operations (components), which taken together form a pipe. Values are accepted at one end of the pipe and the results are available at the other end after the entire operation. For example, Norrie gives an example describing the multiply instruction broken into five components." 1. Compare exponents. 2. Align operands accordingly. 3. Add exponents and multiply mantissas. 4. Determine the normalization factor. 5. Normalize the result. A pipeline can be constructed for these five components which allows the operands to be loaded into one end of the pipeline and serially processed by each component. When the first component completes its processing, the results are sent to the second unit. This process continues until the result is available some five clock cycles later. The key to vector processing comes with the realization that once the first processing component completes its function and passes the result to the next processor, it is free to accept another operand. Therefore, once the pipe is loaded, a new result can be made available each clock cycle. Saturation of the pipeline is best achieved with a sequence of contiguous values which can be loaded each cycle. The term vector processor comes from this need to have contiguous vectors of data available for processing. The time required by a vector processor to complete the sample loop given above can be determined from the number of components of the vector instructions in the loop as well as some additional setup costs. There is a fixed startup cost and a cost to initially saturate the pipe (which is dependent upon the number of components required to perform the desired operation). Once the startup ofthe pipe is completed, new results can be made available with each cycle. Vectorization exhibits its greatest advantage over scalar execution when the number of iterations is large (since the startup and saturation costs will be negligible). Each machine has a threshold at which the initial cost overwhelms the vector speedup, and loops smaller than this value are typically done in scalar mode On the Convex, this "minimum loop count" is about seven. Vector chaining further exploits this architecture by allowing the results of one vector calculation to feed the next calculation. In effect, results made available at the end of one pipeline are fed to the input of …
[1]
Franklin C. Crow,et al.
The aliasing problem in computer-generated shaded images
,
1977,
Commun. ACM.
[2]
David F. Rogers,et al.
Procedural Elements for Computer Graphics
,
1984
.
[3]
Nelson L. Max,et al.
Vectorized procedural models for natural terrain: Waves and islands in the sunset
,
1981,
SIGGRAPH '81.
[4]
Gary A. Crocker.
Invisibility coherence for faster scan-line hidden surface algorithms
,
1984,
SIGGRAPH.
[5]
James F. Blinn,et al.
Models of light reflection for computer synthesized pictures
,
1977,
SIGGRAPH.
[6]
Robert L. Cook,et al.
A Reflectance Model for Computer Graphics
,
1987,
TOGS.
[7]
Frederick P. Brooks,et al.
Fast spheres, shadows, textures, transparencies, and imgage enhancements in pixel-planes
,
1985,
Advances in Computer Graphics.
[8]
Loren C. Carpenter,et al.
The A -buffer, an antialiased hidden surface method
,
1984,
SIGGRAPH.
[9]
Michael J. Bailey,et al.
The Vectorization of a Ray-Tracing Algorithm for Improved Execution Speed
,
1985,
IEEE Computer Graphics and Applications.
[10]
C. Norrie.
Supercomputers for Superproblems: An Architectural Introduction
,
1984,
Computer.
[11]
Adam Levinthal,et al.
Chap - a SIMD graphics processor
,
1984,
SIGGRAPH.
[12]
Larry Rudolph,et al.
A parallel scan conversion algorithm with anti-aliasing for a general-purpose ultracomputer
,
1983,
SIGGRAPH.
[13]
Turner Whitted,et al.
An improved illumination model for shaded display
,
1979,
CACM.
[14]
Richard Weinberg,et al.
Parallel processing image synthesis and anti-aliasing
,
1981,
SIGGRAPH '81.