Investigation for a Smart Power and self-protected device under ESD stress through geometry and design considerations for automotive applications

This paper deals with a detailed study of the ESD capability of self-protected LDMOS used for automotive applications. Failure mechanisms of LDMOS devices during an ESD-HBM discharge are investigated in terms of device size and geometry. Various physical and chemical failure analyses and EMMI measurements are correlated with simulation results. The understanding of the physical mechanisms impacting the ESD capability allows providing practical design guidelines and significant improvement in the ESD robustness of self protected LDMOS.

[1]  Philippe Perdu,et al.  Analysis and compact modeling of a vertical grounded-base NPN bipolar transistor used as an ESD protection in a smart power technology , 2000, Proceedings of the 2000 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.00CH37124).

[2]  Gaudenzio Meneghesso,et al.  ESD robustness of smart-power protection structures evaluated by means of HBM and TLP tests , 2000, 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059).

[3]  Y. Chung,et al.  Electrical-thermal coupling mechanism on operating limit of LDMOS transistor , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[4]  F. Kuper,et al.  Investigations on double-diffused MOS (DMOS) transistors under ESD zap conditions , 1999, Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396).

[5]  G. Groeseneken,et al.  Non-uniform triggering of gg-nMOSt investigated by combined emission microscopy and transmission line pulsing , 1998, Electrical Overstress/ Electrostatic Discharge Symposium Proceedings. 1998 (Cat. No.98TH8347).

[6]  V. Parthasarathy,et al.  A double RESURF LDMOS with drain profile engineering for improved ESD robustness , 2002, IEEE Electron Device Letters.

[7]  Guido Groeseneken,et al.  Non-uniform triggering of gg-nMOSt investigated by combined emission microscopy and transmission line pulsing , 1999 .

[8]  E. A. Amerasekera,et al.  ESD in silicon integrated circuits , 1995 .