Glitch elimination and optimization of dynamic power dissipation in combinational circuits

Low power consumption has become a highly important concern for the designs. Glitches contribute to the dynamic power which itself is a major portion of the total power consumed by designs. A glitch is an undesired transition that occurs before intended value in digital circuits. A glitch occurs in CMOS circuits due to differential delay at the inputs of a gate. The paper describes a procedure to estimate and optimize dynamic power dissipation for combinational circuits due to propagation delay. First, cause of glitch and power dissipated due to presence of it is estimated. Secondly, a technique using transmission gate is employed and the glitch is eliminated. Then a comparison of the power dissipated is carried out to know the optimized power for 1.2μm and 0.8μm CMOS Technologies.

[1]  Kaushik Roy,et al.  Low-Power CMOS VLSI Circuit Design , 2000 .

[2]  A. Sedra.  Microelectronic circuits , 1982 .

[3]  Farid N. Najm,et al.  Power estimation techniques for FPGAs , 2004 .

[4]  George A. Constantinides,et al.  Modeling of glitch effects in FPGA based arithmetic circuits , 2006, 2006 IEEE International Conference on Field Programmable Technology.

[5]  M. Soma,et al.  A statistical approach to the estimation of delay-dependent switching activities in CMOS combinational circuits , 1996, 33rd Design Automation Conference Proceedings, 1996.

[6]  David Harris,et al.  CMOS VLSI Design: A Circuits and Systems Perspective , 2004 .

[7]  Sujit Dey,et al.  Glitch analysis and reduction in register transfer level power optimization , 1996, DAC '96.

[8]  Farid N. Najm,et al.  Transition density: a new measure of activity in digital circuits , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Kurt Keutzer,et al.  Estimation of average switching activity in combinational logic circuits using symbolic simulation , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Mohamed I. Elmasry,et al.  Power dissipation analysis and optimization of deep submicron CMOS digital circuits , 1996, IEEE J. Solid State Circuits.

[11]  Douglas A. Pucknell,et al.  Basic VLSI Design , 1987 .

[12]  Kenneth C. Smith,et al.  Microelectronic circuits, 2nd ed. , 1987 .

[13]  Hendrikus J. M. Veendrick,et al.  Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits , 1984 .

[14]  N. S. Murthy Sharma,et al.  Selective Glitch Reduction Technique for Minimizing Peak Dynamic IR Drop , 2013 .