High-Speed FPGA Implementation of the SHA-1 Hash Function
暂无分享,去创建一个
[1] Odysseas G. Koufopavlou,et al. An ultra high speed architecture for VLSI implementation of hash functions , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.
[2] Todor Cooklev,et al. Air Interface for Fixed Broadband Wireless Access Systems , 2004 .
[3] W. Kou. Wireless Application Protocol , 2006 .
[4] Ronald L. Rivest,et al. The MD5 Message-Digest Algorithm , 1992, RFC.
[5] Odysseas G. Koufopavlou,et al. Networking Data Integrity: High Speed Architectures and Hardware Implementations , 2003, Int. Arab J. Inf. Technol..
[6] Sandra Dominikus,et al. A hardware implementation of MD4-family hash algorithms , 2002, 9th International Conference on Electronics, Circuits and Systems.
[7] Bojani,et al. HASH ALGORITHMS FOR CRYPTOGRAPHIC PROTOCOLS : FPGA IMPLEMENTATIONS , 2002 .
[8] Odysseas G. Koufopavlou,et al. VLSI implementation of the keyed-hash message authentication code for the wireless application protocol , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.