Memory effect reduction for LDMOS bias circuits

Memory effects have taken a very important role in today's design of base station power amplifiers. For example, they are responsible for limiting the cancellation when pre-distortion is applied to a power amplifier system. 1 This study shows how to reduce memory effects for LDMOS power amplifiers and gives test results corresponding to various circuit improvements. The reduction of memory effects become even more desirable as digital pre-distortion evolves as the technology of choice for multi-carrier amplification error correction. 2