A simulation-based evaluation of the cost of cycle time reduction in Agere Systems wafer fabrication facility--a case study
暂无分享,去创建一个
[1] Yon-Chun Chou,et al. Evaluating alternative capacity strategies in semiconductor manufacturing under uncertain demand and price scenarios , 2007 .
[2] M. Page. The free factory: cutting cycle time and gaining output , 1996, IEEE/SEMI 1996 Advanced Semiconductor Manufacturing Conference and Workshop. Theme-Innovative Approaches to Growth in the Semiconductor Industry. ASMC 96 Proceedings.
[3] D. P. Martin. Total operational efficiency (TOE): the determination of two capacity and cycle time components and their relationship to productivity improvements in a semiconductor manufacturing line , 1999, 10th Annual IEEE/SEMI. Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 99 Proceedings (Cat. No.99CH36295).
[4] Averill M. Law,et al. Simulation Modeling and Analysis , 1982 .
[5] Reha Uzsoy,et al. Quantifying the benefits of cycle time reduction in semiconductor wafer fabrication , 2000 .
[6] Tim Baines,et al. A review of multi-factor capacity expansion models for manufacturing plants: Searching for a holistic decision aid , 2007 .
[7] D. P. Martin. Capacity and cycle time-throughput understanding system (CAC-TUS) an analysis tool to determine the components of capacity and cycle time in a semiconductor manufacturing line , 1999, 10th Annual IEEE/SEMI. Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 99 Proceedings (Cat. No.99CH36295).
[8] Douglas C. Montgomery,et al. Response Surface Methodology: Process and Product Optimization Using Designed Experiments , 1995 .
[9] Mansooreh Mollaghasemi,et al. Validation and verification of the simulation model of a photolithography process in semiconductor manufacturing , 1998, 1998 Winter Simulation Conference. Proceedings (Cat. No.98CH36274).
[10] S. S. Kramer. Total cycle time management by operational elements , 1989, IEEE/SEMI International Semiconductor Manufacturing Science Symposium.
[11] Rajan Suri,et al. Quick Response Manufacturing , 1998 .
[12] Jonathan F. Bard,et al. AN OPTIMIZATION APPROACH TO CAPACITY EXPANSION IN SEMICONDUCTOR MANUFACTURING FACILITIES , 1999 .
[13] D. E. Kirjassof,et al. Large-scale business process improvement: reducing total make-to-market cycle time , 1993, [1993 Proceedings] IEEE/SEMI International Semiconductor Manufacturing Science Symposium.
[14] R.G. Sargent,et al. Verification and validation of simulation models , 1994, 2008 Winter Simulation Conference.
[15] D. Meyersdorf,et al. Cycle time reduction for semiconductor wafer fabrication facilities , 1997, 1997 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop ASMC 97 Proceedings.
[16] W. Laure. Cycle time and bottleneck analysis , 1999, 10th Annual IEEE/SEMI. Advanced Semiconductor Manufacturing Conference and Workshop. ASMC 99 Proceedings (Cat. No.99CH36295).