Analog calibration of channel mismatches in time-interleaved ADCs

This paper presents a method for the on-chip measurement and correction of gain errors, offsets and time-skew errors in time-interleaved ADC's. With the proposed method, the errors can be measured and processed in the digital domain. Then, this information is used to optimize several digitally controlled analog parameters of the circuit, that minimize the effect of aforementioned mismatch errors. After optimization, the digital logic can be switched off completely in order to save power. Simulation results on a full-transistor implementation of the time-interleaved sampling structure show that the channel matching errors can be accurately compensated.

[1]  Arthur H. M. van Roermund,et al.  Digital post-correction of front-end track-and-hold circuits in ADCs , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[2]  Solomon W. Golomb,et al.  Shift Register Sequences , 1981 .

[3]  D. Draxelmayr,et al.  Compensation of timing mismatches in time-interleaved analog-to-digital converters through transfer characteristics tuning , 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

[4]  Arthur H. M. van Roermund,et al.  Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[5]  Håkan Johansson,et al.  Reconstruction of nonuniformly sampled bandlimited signals by means of digital fractional delay filters , 2002, IEEE Trans. Signal Process..

[6]  A.H.M. van Roermund,et al.  Novel Digital Pre-Correction Method For Mismatch in DACs with Built-In-Self Measurement , 2005 .

[7]  Håkan Johansson,et al.  Time-interleaved analog-to-digital converters: status and future directions , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[8]  Gernot Kubin,et al.  Spectral shaping of timing mismatches in time-interleaved analog-to-digital converters , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[9]  W. Black,et al.  Time interleaved converter arrays , 1980, 1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[10]  Stephen H. Lewis,et al.  Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.