Comprehensive analysis and optimization of CMOS neural amplifiers for wireless recording implants

Neural amplifiers play a critical role in the bandwidth, power consumption, noise performance and area of wireless neural recording systems. This paper presents comprehensive analysis of neural amplifier design to optimize these performance characteristics. Amplifier architectures and feedback structures are analyzed to identify the best choice for implantable neural recording applications. Bandwidth and phase margin requirements are analyzed to identify an optimization path through relaxing phase margin requirements. To optimize the noise performance and circuit area, noise capacitive matching is applied to optimize the size of neural amplifier capacitors. Following the optimization guidelines identified in this paper, noise efficiency and a figure of merit for neural amplifiers were effectively improved.

[1]  D. Kleinfeld,et al.  Variability of extracellular spike waveforms of cortical neurons. , 1996, Journal of neurophysiology.

[2]  Rahul Sarpeshkar,et al.  An Energy-Efficient Micropower Neural Recording Amplifier , 2007, IEEE Transactions on Biomedical Circuits and Systems.

[3]  Moo Sung Chae,et al.  Design Optimization for Integrated Neural Recording Systems , 2008, IEEE Journal of Solid-State Circuits.

[4]  Willy Sansen,et al.  analog design essentials , 2011 .

[5]  Reid R. Harrison,et al.  A low-power, low-noise CMOS amplifier for neural recording applications , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[6]  Reid R. Harrison,et al.  The Design of Integrated Circuits to Observe Brain Activity , 2008, Proceedings of the IEEE.

[7]  R. Genov,et al.  256-Channel Neural Recording and Delta Compression Microsystem With 3D Electrodes , 2009, IEEE Journal of Solid-State Circuits.

[8]  Yusuf Leblebici,et al.  Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor , 2011, IEEE Transactions on Biomedical Circuits and Systems.

[9]  Kensall D. Wise,et al.  Band-tunable and multiplexed integrated circuits for simultaneous recording and stimulation with microelectrode arrays , 2005, IEEE Transactions on Biomedical Engineering.

[10]  Awais M. Kamboh,et al.  Area-Power Efficient VLSI Implementation of Multichannel DWT for Data Compression in Implantable Neuroprosthetics , 2007, IEEE Transactions on Biomedical Circuits and Systems.