Built-in self-test structure for mixed-mode circuits

A built-in self-test (BIST) structure is presented which provides controllability and observability to analog circuits under test with significantly reduced hardware overhead compared to previously reported methods. The test structure is equally applicable to digital circuits, and lends itself to automated insertion into circuits under test. >

[1]  Chin-Long Wey,et al.  Built-in self-test (BIST) design of large-scale analog circuit networks , 1989, IEEE International Symposium on Circuits and Systems,.

[2]  J.W. Bandler,et al.  Fault diagnosis of analog circuits , 1985, Proceedings of the IEEE.

[3]  John W. Bandler,et al.  Multiple-fault location of analog circuits , 1981 .

[4]  R. de Carlo,et al.  Analog multifrequency fault diagnosis , 1983 .

[5]  Chin-Long Wey,et al.  On the Implementation of an Analog ATPG: The Linear Case , 1985, IEEE Transactions on Instrumentation and Measurement.

[6]  Edward McCluskey,et al.  Built-In Self-Test Techniques , 1985, IEEE Design & Test of Computers.

[7]  M.E. Levitt.  ASIC testing upgraded , 1992, IEEE Spectrum.

[8]  Chin-Long Wey.  Built-in self-test (BIST) structure for analog circuit fault diagnosis , 1990 .

[9]  Kamran Eshraghian,et al.  Principles of CMOS VLSI Design: A Systems Perspective , 1985 .

[10]  Chin-Long Wey,et al.  Analog Fault Diagnosis , 1988 .