High Performance Nano Device with Reduced Short Channel Effects in High Temperature Applications

[1]  Xie Xuesong,et al.  Accelerating the life of transistors , 2013 .

[2]  Ankit Tripathi,et al.  Temperature effects on Threshold Voltage and Mobility for Partially Depleted SOI MOSFET , 2012 .

[3]  A. Orouji,et al.  A novel high breakdown voltage LDMOS by protruded silicon dioxide at the drift region , 2016 .

[4]  Wen-Yan Yin,et al.  Electrothermal Effects on Hot-Carrier Reliability in SOI MOSFETs—AC Versus Circuit-Speed Random Stress , 2016, IEEE Transactions on Electron Devices.

[5]  S. K. Sarkar,et al.  Spatial Composition Grading of Binary Metal Alloy Gate Electrode for Short-Channel SOI/SON MOSFET Application , 2012, IEEE Transactions on Electron Devices.

[6]  M. Mehrad.  Periodic trench region in LDMOS transistor: A new reliable structure with high breakdown voltage , 2016 .

[7]  Bo Zhang,et al.  Low on-Resistance SOI Dual-Trench-Gate MOSFET , 2012, IEEE Transactions on Electron Devices.

[8]  A. Orouji,et al.  Partially Cylindrical Fin Field-Effect Transistor: A Novel Device for Nanoscale Applications , 2010, IEEE Transactions on Device and Materials Reliability.

[9]  M. Mehrad.  Omega shape channel LDMOS: A novel structure for high voltage applications , 2016 .

[10]  S. Cristoloveanu,et al.  Mobility Enhancement by Back-Gate Biasing in Ultrathin SOI MOSFETs With Thin BOX , 2012, IEEE Electron Device Letters.

[11]  N. Moezi,et al.  Benchmarking Performance of a Gate-All-Around Germanium Nanotube Field Effect Transistor (GAA-GeNTFET) against GAA-CNTFET , 2017 .

[12]  Mahsa Mehrad.  Reducing Floating Body and Short Channel Effects in Nano Scale Transistor: Inserted P+ Region SOI-MOSFET , 2016 .

[13]  M. Zareiee,et al.  Improved Device Performance in Nano Scale Transistor: An Extended Drain SOI MOSFET , 2016 .

[14]  M. Zareiee,et al.  A novel high performance nano-scale MOSFET by inserting Si3N4 layer in the channel , 2015 .

[15]  C. Qiu,et al.  A Tunnel Diode Body Contact Structure for High-Performance SOI MOSFETs , 2012, IEEE Transactions on Electron Devices.

[16]  A novel Silicon on Insulator MOSFET with an embedded heat pass path and source side channel doping , 2016 .

[17]  Meysam Zareiee.  Modifying Buried Layers in Nano-MOSFET for Achieving Reliable Electrical Characteristics , 2016 .

[18]  A. Orouji,et al.  A new nanoscale and high temperature field effect transistor: Bi level FinFET , 2011 .

[19]  A. Orouji,et al.  A new technique in LDMOS transistors to improve the breakdown voltage and the lattice temperature , 2015 .

[20]  N. Moezi,et al.  Investigation of sub-10nm cylindrical surrounding gate germanium nanowire field effect transistor with different cross-section areas , 2017 .

[21]  S. Sarkar,et al.  Work Function Engineering With Linearly Graded Binary Metal Alloy Gate Electrode for Short-Channel SOI MOSFET , 2012, IEEE Transactions on Nanotechnology.

[22]  Yuan Taur,et al.  Comprehensive Analysis of Short-Channel Effects in Ultrathin SOI MOSFETs , 2013, IEEE Transactions on Electron Devices.

[23]  Behzad Ebrahimi,et al.  A partial-SOI LDMOSFET with triangular buried-oxide for breakdown voltage improvement , 2011, Microelectron. Reliab..