A basic model for static parallel operation of power MOSFETs is extended to include the impact of branch inductances as well as their mismatch on current sharing and on worst-case junction temperature. Assuming moderate temperature ripples, the thermal aspects of paralleling MOSFETs in a typical half-bridge circuit are analysed using a local average approximation method. Regarding PWM operation, equations are derived for the steady state to deduce the worst-case scenario for any number of parallel devices at given parameter spread and operation conditions. In an example, a worst-case is identified by that model, which is then employed in simulations of a more complex electro-thermal SPICE model to further include switching losses. Comparison shows that both of the considered dynamic current-sharing effects may substantially contribute to the peak junction temperatures.
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