Large-scale field-programmable analog arrays for analog signal processing

Field-programmable analog arrays (FPAAs) provide a method for rapidly prototyping analog systems. Currently available commercial and academic FPAAs are typically based on operational amplifiers (or other similar analog primitives) with only a few computational elements per chip. While their specific architectures vary, their small sizes and often restrictive interconnect designs leave current FPAAs limited in functionality and flexibility. For FPAAs to enter the realm of large-scale reconfigurable devices such as modern field-programmable gate arrays (FPGAs), new technologies must be explored to provide area-efficient accurately programmable analog circuitry that can be easily integrated into a larger digital/mixed-signal system. Recent advances in the area of floating-gate transistors have led to a core technology that exhibits many of these qualities, and current research promises a digitally controllable analog technology that can be directly mated to commercial FPGAs. By leveraging these advances, a new generation of FPAAs is introduced in this paper that will dramatically advance the current state of the art in terms of size, functionality, and flexibility. FPAAs have been fabricated using floating-gate transistors as the sole programmable element, and the results of characterization and system-level experiments on the most recent FPAA are shown.

[1]  Massimo A. Sivilotti,et al.  Wiring considerations in analog VLSI systems, with application to field-programmable networks , 1992 .

[2]  Christopher M. Twigg,et al.  10-bit programmable voltage-output digital-analog converter , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[3]  E.K.F. Lee,et al.  A CMOS field-programmable analog array , 1991 .

[4]  Marek Wojcikowski,et al.  A field programmable analog array for CMOS continuous-time OTA-C filter applications , 2002 .

[5]  David V. Anderson,et al.  Mel-frequency cepstrum encoding in analog floating-gate circuitry , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[6]  B.R. Hayes-Gill,et al.  Multi-function block for a switched current field programmable analogue array , 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

[7]  H. Melchior,et al.  A four-state EEPROM using floating-gate memory cells , 1987 .

[8]  Paul E. Hasler,et al.  Floating-gate devices: they are not just for digital memories any more , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[9]  David V. Anderson,et al.  Application performance of elements in a floating-gate FPAA , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[10]  Paul E. Hasler,et al.  Adaptive circuits using pFET floating-gate devices , 1999, Proceedings 20th Anniversary Conference on Advanced Research in VLSI.

[11]  P.R. Gray,et al.  A precision curvature-compensated CMOS bandgap reference , 1983, IEEE Journal of Solid-State Circuits.

[12]  David V. Anderson,et al.  Developing large-scale field-programmable analog arrays , 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

[13]  David V. Anderson,et al.  Programmable multiple input translinear elements , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[14]  Adrian Stoica,et al.  Reconfigurable VLSI architectures for evolvable hardware: from experimental field programmable transistor arrays to evolution-oriented chips , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[15]  E. Sanchez-Sinencio,et al.  A current-mode based field programmable analog array architecture for signal processing applications , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[16]  Susumu Kohyama,et al.  A Thermionic Electron Emission Model for Charge Retention in SAMOS Structure , 1982 .

[17]  Martin A. Brooke,et al.  A temperature stable current reference source with programmable output , 1992, [1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems.

[18]  Joachim Becker,et al.  A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable G/sub M/-cells , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[19]  Paul Hasler,et al.  A programmable continuous-time floating-gate Fourier processor , 2001 .

[20]  Paul E. Hasler,et al.  Practical issues using e-pot circuits , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[21]  David V. Anderson,et al.  Placement for large-scale floating-gate field-programable analog arrays , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[22]  Kim Strohbehn,et al.  A field-programmable mixed-signal array architecture using antifuse interconnects , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[23]  E.K.F. Lee,et al.  A transconductor-based field-programmable analog array , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

[24]  Paul E. Hasler,et al.  Offset compensation in flash ADCs using floating-gate circuits , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[25]  Bradley A. Minch,et al.  Construction and transformation of multiple-input translinear element networks , 2003 .

[26]  Olgierd A. Palusinski,et al.  A field programmable analog array and its application , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[27]  David Graham,et al.  A kappa projection algorithm (KPA) for programming to femtoampere currents in standard CMOS floating-gate elements , 2005, 48th Midwest Symposium on Circuits and Systems, 2005..

[28]  Paul Hasler,et al.  Biologically inspired auditory sensing system interfaces on a chip , 2002, Proceedings of IEEE Sensors.

[29]  Stilianos Siskos,et al.  Design of voltage-mode and current-mode computational circuits using floating-gate MOS transistors , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[30]  R. Jacob Baker,et al.  CMOS Circuit Design, Layout, and Simulation , 1997 .

[31]  L. Carley,et al.  Trimming analog circuits using floating-gate analog MOS memory , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

[32]  W. Guggenbuhl,et al.  An analog trimming circuit based on a floating-gate device , 1988 .

[33]  Paul E. Hasler,et al.  A precision CMOS amplifier using floating-gates for offset cancellation , 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

[34]  G.E.R. Cowan,et al.  A VLSI analog computer/digital computer accelerator , 2006, IEEE Journal of Solid-State Circuits.

[35]  Behzad Razavi,et al.  Design of Analog CMOS Integrated Circuits , 1999 .

[36]  David V. Anderson,et al.  Developing large-scale field-programmable analog arrays for rapid prototyping , 2005, Int. J. Embed. Syst..

[37]  Paul E. Hasler,et al.  Indirect Programming of Floating-Gate Transistors , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[38]  Abhishek Bandyopadhyay,et al.  Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[39]  David V. Anderson,et al.  Field-Programmable Analog Arrays: A Floating-Gate Approach , 2002, FPL.

[40]  Bradley A. Minch,et al.  Synthesis of static and dynamic multiple-input translinear element networks , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[41]  Colin Lyden,et al.  A CMOS continuous-time field programmable analog array , 1997, FPGA '97.

[42]  Parimal Pal Chaudhuri,et al.  Design of OTA based field programmable analog array [CMOS VLSI] , 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.

[43]  Paul E. Hasler,et al.  Accurate programming of analog floating-gate arrays , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[44]  Christopher M. Twigg,et al.  Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[45]  Christopher M. Twigg,et al.  A Compact Programmable CMOS Reference With ±40μV Accuracy , 2006, IEEE Custom Integrated Circuits Conference 2006.

[46]  A. Rodriguez-Vazquez,et al.  OTA-based non-linear function approximations , 1989, IEEE International Symposium on Circuits and Systems,.

[47]  T. R. Viswanathan,et al.  A CMOS bandgap reference without resistors , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[48]  David V. Anderson,et al.  Programmable and adaptive analog filters using arrays of floating-gate circuits , 2001, Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001.

[49]  Paul Hasler,et al.  A continuous-time speech enhancement front-end for microphone inputs , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[50]  Gene Frantz,et al.  ADVANCEMENTS IN DIGITAL SIGNAL PROCESSING TECHNOLOGY ARE ENABLING ITS USE FOR INCREASINGLY WIDESPREAD APPLICATIONS . DEVELOPERS WILL BE CHALLENGED TO USE THIS PROCESSING POWER TO ITS UTMOST , WHILE CREATING NEW APPLICATIONS AND IMPROVING EXISTING ONES , 2022 .

[51]  Paul Hasler,et al.  An Autozeroing Floating-Gate Amplifier , 2001 .

[52]  David V. Anderson,et al.  Mapping algorithm for large-scale field programmable analog array , 2005, ISPD '05.

[53]  Yichuang Sun.  Design of high frequency integrated analogue filters , 2002 .

[54]  Tyson S. Hall,et al.  Automatic rapid programming of large arrays of floating-gate elements , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[55]  H. W. Klein,et al.  The EPAC architecture: an expert cell approach to field programmable analog circuits , 1996, Proceedings of the 39th Midwest Symposium on Circuits and Systems.

[56]  Paul E. Hasler,et al.  A five-transistor bandpass filter element , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[57]  David V. Anderson,et al.  Hierarchical placement for large-scale FPAA , 2005, International Conference on Field Programmable Logic and Applications, 2005..