High performance continuous-time filters for information transfer systems

High Performance Continuous-time Filters for Information Transfer Systems. (August 2003) Ahmed Nader Mohieldin, B.Sc., Cairo University, Egypt; M.Sc., Cairo University, Egypt; Chairs of Advisory Committee: Dr. Edgar Sánchez-Sinencio Vast attention has been paid to active continuous-time filters over the years. The changes in technology have required new approaches. Thus as cheap, readily available integrated circuit OpAmps replaced their discrete circuit versions, it became feasible to consider active-RC filter circuits using large numbers of OpAmps, and new improved architectures emerged. Similarly the development of integrated operational Transconductnace Amplifier (OTA) led to new filter configurations and allowed practical solutions to problems using currents as the variables of interest, rather than voltages. That is trasconductance-mode. This gives rise to OTA-C filters, using only active devices and capacitors, making it more suitable for integration. The demands on filter circuits have become ever more stringent as the world of electronics and communications has advanced. In addition, the continuing increase in the operating frequencies of modern circuits and systems increases the need for active filters that can perform at these higher frequencies; an area where the LC active filter emerges. What mainly limit the performance of an analog circuit are the non-idealities of the used building blocks and the circuit architecture. The research is concentrating on the design issues of high frequency continuous-time integrated filters. Several novel circuit building blocks are introduced. A novel pseudo-differential fully balanced fully symmetric CMOS OTA architecture with inherent common-mode detection is proposed. Through judicious arrangement, the common-mode feedback circuit can be economically implemented. On the level of system architectures, a novel filter low-voltage 4 order RF bandpass filter structure based on emulation of two magnetically coupled resonators is presented. A unique feature of the proposed architecture is using electric coupling to emulate the effect of the coupled-inductors, thus providing bandwidth tuning with small passband ripple. Each resonator is built using on-chip spiral inductors and accumulation-mode PMOS capacitors to provide center frequency tuning. As part of a direct conversion dual-mode 802.11b/Bluetooth receiver, a BiCMOS 5 order low-pass channel selection filter is designed. The filter operated from single 2.5V supply and achieves 76dB of out-of-band SFDR. A digital automatic tuning system is also implemented to account for process and temperature variations. As part of a Bluetooth transmitter, a low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Piecewise linear approximation is used to avoid using ROM look-up table to store the sine values in a conventional DDFS. Significant saving in power consumption, due to the elimination of the ROM, renders the design more suitable for portable wireless communication applications.

[1]  H.C. Luong,et al.  A fully-integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[2]  William B. Kuhn,et al.  Q-enhanced LC bandpass filters for integrated wireless applications , 1998 .

[3]  E.K.F. Lee,et al.  Design of low-power ROM-less direct digital frequency synthesizer using nonlinear digital-to-analog converter , 1999, IEEE J. Solid State Circuits.

[4]  Robert Weigel,et al.  SAW devices and their wireless communications applications , 2002 .

[5]  Chung-Yu Wu,et al.  The design of a 3-V 900-MHz CMOS bandpass amplifier , 1997 .

[6]  S.S. Wong,et al.  A 0 dB-IL, 2140/spl plusmn/30 MHz bandpass filter utilizing Q-enhanced spiral inductors in standard CMOS , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[7]  M. A. Copeland,et al.  A 1.9-GHz silicon receiver with monolithic image filtering , 1998 .

[8]  G. Feygin,et al.  A 160 MHz analog equalizer for magnetic disk read channels , 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.

[9]  Y. Wang,et al.  A 150 MHz continuous-time seventh order 0.05/spl deg/ equiripple linear phase filter , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[10]  P. R. Gray,et al.  High-frequency CMOS continuous-time filters , 1984 .

[11]  Y. Tsividis,et al.  A 1.9 GHz Si active LC filter with on-chip automatic tuning , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[12]  Anatol I. Zverev,et al.  Handbook of Filter Synthesis , 1967 .

[13]  Andrea Baschirotto,et al.  Modeling sigma-delta modulator non-idealities in SIMULINK(R) , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[14]  N. Rao,et al.  A 3V 10-100 MHz continuous-time seventh-order 0.05/spl deg/ equiripple linear-phase filter , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

[15]  Howard C. Luong,et al.  A 3-V 44-MHz switched-capacitor bandpass filter for digital video application , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[16]  Jaime Ramirez-Angulo,et al.  Low-voltage CMOS op-amp with rail-to-rail input and output signal swing for continuous-time signal processing using multiple-input floating-gate transistors , 2001 .

[17]  A. Yasuda,et al.  A 2.7-V, 200-kHz, 49-dBm, stopband-IIP3, low-noise, fully balanced gm-C filter IC , 1999 .

[18]  A. Parssinen,et al.  A channel selection filter for a WCDMA direct conversion receiver , 2000, Proceedings of the 26th European Solid-State Circuits Conference.

[19]  Edgar Sanchez-Sinencio,et al.  CMOS transconductance amplifiers, architectures and active filters: a tutorial , 2000 .

[20]  Amir M. Sodagar,et al.  Mapping from phase to sine-amplitude in direct digital frequency synthesizers using parabolic approximation , 2000 .

[21]  A. T. Behr,et al.  Harmonic distortion caused by capacitors implemented with MOSFET gates , 1992 .

[22]  W. Dehaene,et al.  A 50 MHz, standard CMOS, pulse equalizer for hard disk read channels , 1996, ESSCIRC '96: Proceedings of the 22nd European Solid-State Circuits Conference.

[23]  Kiat Seng Yeo,et al.  1.5 V 1.8 GHz bandpass amplifier , 2000 .

[24]  Deog-Kyoon Jeong,et al.  A fully-integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems , 2001, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).

[25]  Apinunt Thanachayanont,et al.  100-MHz CMOS direct digital synthesizer with 10-bit DAC , 2002, Asia-Pacific Conference on Circuits and Systems.

[26]  A.M. Fahim,et al.  Low-power direct digital frequency synthesis for wireless communications , 2000, IEEE Journal of Solid-State Circuits.

[27]  Edgar Sanchez-Sinencio,et al.  A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector , 2003, IEEE J. Solid State Circuits.

[28]  J. Silva-Martinez,et al.  Design considerations of bandpass LC filters for RF applications , 2002, The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002..

[29]  E.K.F. Lee,et al.  Digital frequency and Q tuning technique for low-voltage active filters , 1999 .

[30]  A. S. Sedra,et al.  A Q-enhanced active-RLC bandpass filter , 1997 .

[31]  Edgar Sanchez-Sinencio,et al.  A 100-MHz 8-mW ROM-less quadrature direct digital frequency synthesizer , 2002, IEEE J. Solid State Circuits.

[32]  Gabor C. Temes,et al.  A 16-bit low-voltage CMOS A/D converter , 1987 .

[33]  Ali M. Niknejad,et al.  Analysis, design, and optimization of spiral inductors and transformers for Si RF ICs , 1998, IEEE J. Solid State Circuits.

[34]  Saska Lindfors,et al.  A 3-V continuous-time filter with on-chip tuning for IS-95 , 1999 .

[35]  K. Hettak,et al.  Overlapping, multiple CPW stub structures for high density MMICs , 2001, 2001 IEEE MTT-S International Microwave Sympsoium Digest (Cat. No.01CH37157).

[36]  R. Sallen,et al.  A practical method of designing RC active filters , 1955, IRE Transactions on Circuit Theory.

[37]  J. Francisco Duque-Carrillo Continuous-time common-mode feedback networks for fully-differential amplifiers: a comparative study , 1993, 1993 IEEE International Symposium on Circuits and Systems.

[38]  J. Silva-Martinez,et al.  Linearized OTAs for high-frequency continuous-time filters: a comparative study , 2002, The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002..

[39]  J.S. Martinez Analog building blocks for high frequency applications , 2001, Proceedings of the IEEE 2nd Dallas CAS Workshop on Low Power/Low Voltage Mixed-Signal Circuits & Systems (DCAS-01) (Cat. No.01EX454).

[40]  G. Muller,et al.  A new low loss SAW filter structure with extremely wide bandwidth for mobile communication systems , 1993, 1993 IEEE MTT-S International Microwave Symposium Digest.

[41]  C. R. Cole,et al.  CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications , 1984 .

[42]  Wilfred Vance Kenzle FIESTA II a software tool for electronic filter design , 1997 .

[43]  K. Halonen,et al.  A 2.7V CMOS dual-mode baseband filter for PDC and WCDMA , 2000, Proceedings of the 26th European Solid-State Circuits Conference.

[44]  H.R. Rategh,et al.  A 5-GHz CMOS wireless LAN receiver front end , 2000, IEEE Journal of Solid-State Circuits.

[45]  Kenneth R. Laker,et al.  Multiple-Loop Feedback Topologies for the Design of Low-Sensitivity Active Filters , 1979 .

[46]  P. Brackett,et al.  Direct SFG simulation of LC ladder networks with applications to active filter design , 1976 .

[47]  J. F. Duque-Carrillo Control of the common-mode component in CMOS continuous-time fully differential signal processing , 1993 .

[48]  Chuan Yi Tang,et al.  A 2.|E|-Bit Distributed Algorithm for the Directed Euler Trail Problem , 1993, Inf. Process. Lett..

[49]  William Martin Snelgrove,et al.  A balanced 0.9- mu m CMOS transconductance-C filter tunable over the VHF range , 1992 .

[50]  Luca Fanucci,et al.  Fully integrated low-noise-amplifier with high quality factor L-C filter for 1.8 GHz wireless applications , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[51]  Rolf Schaumann,et al.  Avoiding common-mode feedback in continuous-time g/sub m/-C filters by use of lossy integrators , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[52]  Yichuang Sun,et al.  Continuous-Time Active Filter Design , 1998 .

[53]  Edgar Sanchez-Sinencio,et al.  A 2.7V, 1.8GHz, 4 th order tunable LC bandpass filter with ± 0.25dB passband ripple , 2002 .

[54]  Jaime Ramirez-Angulo,et al.  Low-voltage circuits building blocks using multiple-input floating-gate transistors , 1995 .

[55]  William B. Kuhn,et al.  A 200 MHz CMOS Q-enhanced LC bandpass filter , 1996 .

[56]  Benjamin J. Blalock,et al.  A 1 V CMOS op amp using bulk-driven MOSFETs , 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

[57]  K. Martin,et al.  Design of signal flow graph (SFG) active filters , 1978 .

[58]  David A. Johns,et al.  Analog Integrated Circuit Design , 1996 .

[59]  M. S. Ghausi,et al.  Design of high-order active filters in integrated circuits , 1978 .

[60]  E. Sánchez-Sinencio,et al.  Nonlinear effects in pseudo differential OTAs with CMFB , 2003, IEEE Trans. Circuits Syst. II Express Briefs.

[61]  A. Yoshizawa,et al.  Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers , 2002, IEEE J. Solid State Circuits.

[62]  Tetsuro Itakura,et al.  Design of Fully Balanced Analog Systems Based on Ordinary and/or Modified Single-Ended Opamps , 1999 .

[63]  A.M. Niknejad,et al.  Modeling of passive elements with ASITIC , 2002, 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280).

[64]  Edgar Sanchez-Sinencio,et al.  An enhanced adaptive Q-tuning scheme for a 100-MHz fully symmetric OTA-based bandpass filter , 2003 .

[65]  Michiel Steyaert,et al.  Wireless CMOS Frequency Synthesizer Design , 1998 .

[66]  Yannis Tsividis,et al.  A Si 1.8 GHz RLC filter with tunable center frequency and quality factor , 1996, IEEE J. Solid State Circuits.

[67]  E.K.F. Lee,et al.  A ROM-less direct digital frequency synthesizer using segmented nonlinear digital-to-analog converter , 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

[68]  J. Silva-Martinez,et al.  A low–voltage fully balanced OTA with common mode feedforward and inherent common mode feedback detector , 2002, Proceedings of the 28th European Solid-State Circuits Conference.

[69]  E. Sanchez-Sinencio,et al.  A practical quality factor tuning scheme for IF and high-Q continuous-time filters , 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

[70]  Michiel Steyaert,et al.  A large-signal very low-distortion transconductor for high-frequency continuous-time filters , 1991 .

[71]  H. A. Alzaher,et al.  A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers , 2002 .

[72]  Edgar Sanchez-Sinencio,et al.  On-chip ramp generators for mixed-signal BIST and ADC self-test , 2003, IEEE J. Solid State Circuits.

[73]  Andrea Baschirotto,et al.  A 3 V 12-55 MHz BiCMOS pseudo-differential continuous-time filter , 1995 .

[74]  Rinaldo Castello,et al.  Solutions for image rejection CMOS LNA , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[75]  Piet Wambacq,et al.  Distortion analysis of analog integrated circuits , 1998 .

[76]  Tadashi Shibata,et al.  A functional MOS transistor featuring gate-level weighted sum and threshold operations , 1992 .