论文信息 - A subnanosecond clamped-bit-line sense amplifier for 1T dynamic RAMs

A subnanosecond clamped-bit-line sense amplifier for 1T dynamic RAMs

A clamped-bit-line sense amplifier (CBLSA) capable of subnanosecond response in 1T DRAM applications has been developed. Results from an experimental test chip demonstrate that the speed of the new circuit is insensitive to bit line capacitance. The CBLSA maintains a low impedance fixed potential on the bit lines, virtually eliminating sensitivity to inter-bit-line noise coupling and minimizing power supply bounce during sensing.<<ETX>>

Richard C. Jaeger | T. N. Blalock

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