Exploiting Bias in the Hysteresis Bit of 2-bit Saturating Counters in Branch Predictors

The states of the 2-bit counters used in many branch prediction schemes can be divided into “strong” and “weak” states. Instead of the typical saturating counter encoding of the states, the 2-bit counter can be encoded such that the least significant bit directly represents whether the current state is strong or weak. This extra bit provides hysteresis to prevent the counters from switching directions too quickly. Past studies have exploited the strong bias of the direction bit to construct better branch predictors. We show that counters exhibit a strong bias in the hysteresis bit as well, suggesting that an entire bit dedicated to hysteresis is overkill. Using data-compression techniques, we empirically demonstrate that the information theoretic entropy of the hysteresis bit conveys less than 0.18 bits per prediction of information for a gshare branch predictor. We explain how to construct fractional-bit shared split counters (SSC) by sharing a single hysteresis bit between multiple counters. We show that predictors implemented with shared split counters perform nearly as well as the corresponding two-bit counter versions, while providing area reductions of 25-37.5%.