Impact of gate workfunction in junctionless versus junction SOI n-MOSFET transistor

In this paper, the effect of gate workfunction variation on DC characteristics in 100 nm gate length silicon-on-insulator (SOI) junctionless (JL) and junction transistors has been investigated by using numerical simulations. The digital figure-of-merits characteristics such as threshold voltage (VTH), on/off-current ratio, subthreshold voltage, and drain-induced-barrier-lowering are the main parameters that have been investigated. The rate of change in VTH with the respect to gate workfunction for both JLT and JT devices was almost same. Besides that, it shows the designated JLT device is achieving full-depletion at higher gate workfunction of more than 5.0 eV whereas the designated JT device is more wider range, ranging from low, mid-gap or high workfunction.