Delay bounds for FIFO aggregates: a case study

In a Diffserv architecture, packets with the same marking are treated as an aggregate at core routers, independently of the flow they belong to. Nevertheless, for the purpose of QoS provisioning, derivation of upper bounds on the delay of individual flows is of great importance. In this paper, we consider a case study network, composed by a tandem of rate-latency servers that is traversed by a tagged flow. At each different node, the tagged flow is multiplexed into a FIFO buffer with a different interfering flow. For the case study network, we derive an end-to-end delay bound for tagged flow traffic that, to the best of our knowledge, is better than any other applicable result available from the literature.