Non-invasive timing analysis of IBM G6 microprocessor L1 cache using picosecond imaging circuit analysis

The new non-invasive backside timing characterization technique, Picosecond Imaging Circuit Analysis (PICA), was applied to the identification and analysis of a race condition which occurred in an early design of the L1 cache of the S/390 microprocessor. The circuit switching activity was visualized in reconstructed slow motion videos of passing and failing conditions. An automated emission waveform extraction and analysis tool was used to perform a quantitative study of the failing condition.

[1]  J.A. Kash,et al.  Picosecond imaging circuit analysis of the POWER3 clock distribution , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

[2]  J. Kash,et al.  Dynamic internal testing of CMOS circuits using hot luminescence , 1997, IEEE Electron Device Letters.

[3]  David P. Vallett.  IC Failure Analysis: The Importance of Test and Diagnostics , 1997, IEEE Des. Test Comput..

[4]  G. Woods,et al.  Optical probing of flip-chip-packaged microprocessors , 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

[5]  Pia Sanda,et al.  The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA) , 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

[6]  Leendert M. Huisman,et al.  Diagnosis and characterization of timing-related defects by time-dependent light emission , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[7]  Richard E. Anderson,et al.  IC Failure Analysis: Magic, Mystery, and Science , 1997, IEEE Des. Test Comput..

[8]  David P. Vallett,et al.  Picosecond imaging circuit analysis , 1998, IBM J. Res. Dev..