Exploring the Effect of Segmentation on INL and DNL for a 10-bit DAC

This paper investigates the impact of segmentation on the Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) of a 10-bit differential output current-steering Digital-to-Analog Converter (DAC), implemented in a 40 nm, 2.5 V, CMOS process. The achievable DNL improvement was characterized by simulating all intermediate degrees of segmentation possible between a binary and a thermometric implementation. The DNL results ranged between (-0.467, +0.474) LSB and (-0.024, +0.026) LSB with the INL remaining almost invariant at (-0.376, +0.345) LSB. The differential output current of +/-1mA was achieved for a circuit with an active analog area of 0.01 mm2.

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