A Selected Inversion Approach for Locality Driven Vectorless Power Grid Verification

Vectorless power grid verification is a practical approach for early stage safety check without input current patterns. The power grid is usually formulated as a linear system and requires intensive matrix inversion and numerous linear programming (LP), which is extremely time-consuming for large-scale power grid verification. In this paper, the power grid is represented in the manner of domain-decomposition approach, and we propose a selected inversion technique to reduce the computation cost of matrix inversion for vectorless verification. The locality existence among power grids is exploited to decide which blocks of matrix inversion should be computed while remaining blocks are not necessary. The vectorless verification could be purposefully performed by this manner of selected inversion, while previous direct approaches are required to perform full matrix inversion and then discard small entries to reduce the complexity of LP. Meanwhile, constraint locality is proposed to improve the verification accuracy. In addition, a concept of quasi-Poisson block is introduced to exploit grid locality among realistic power grids and a scheme of pad-aware partitioning is proposed to enable the selected inversion approach available for practical use. Experimental results show that the proposed approach could achieve significant speedups compared with previous approaches while still guaranteeing the quality of solution accuracy.

[1]  Joost Rommes,et al.  Efficient Methods for Large Resistor Networks , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Farid N. Najm,et al.  Efficient RC power grid verification using node elimination , 2011, 2011 Design, Automation & Test in Europe.

[3]  Nestoras E. Evmorfopoulos,et al.  Selective inversion of inductance matrix for large-scale sparse RLC simulation , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[4]  Farid N. Najm,et al.  Early P/G grid voltage integrity verification , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[5]  Charlie Chung-Ping Chen,et al.  Efficient large-scale power grid analysis based on preconditioned Krylov-subspace iterative methods , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[6]  Peng Li,et al.  Locality-Driven Parallel Power Grid Optimization , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[7]  Yousef Saad,et al.  Domain-Decomposition-Type Methods for Computing the Diagonal of a Matrix Inverse , 2011, SIAM J. Sci. Comput..

[8]  Jia Wang,et al.  A hierarchical matrix inversion algorithm for vectorless power grid verification , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[9]  Diogo Vieira Andrade,et al.  Good approximations for the relative neighbourhood graph , 2001, CCCG.

[10]  Yici Cai,et al.  A multilevel ℌ-matrix-based approximate matrix inversion algorithm for vectorless power grid verification , 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

[11]  Farid N. Najm,et al.  A static pattern-independent technique for power grid voltage integrity verification , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[12]  Yici Cai,et al.  Selected inversion for vectorless power grid verification by exploiting locality , 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

[13]  R. Urquhart.  Algorithms for computation of relative neighbourhood graph , 1980 .

[14]  Eby G. Friedman,et al.  Fast algorithms for IR voltage drop analysis exploiting locality , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

[15]  Jia Wang,et al.  Dual Algorithms for Vectorless Power Grid Verification Under Linear Current Constraints , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  Godfried T. Toussaint,et al.  The relative neighbourhood graph of a finite planar set , 1980, Pattern Recognit..

[17]  Zhuo Feng.  Scalable vectorless power grid current integrity verification , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[18]  Farid N. Najm,et al.  Power grid verification using node and branch dominance , 2011, 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC).

[19]  Yici Cai,et al.  GPU friendly Fast Poisson Solver for structured power grid network analysis , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[20]  Ngai Wong,et al.  A Realistic Early-Stage Power Grid Verification Algorithm Based on Hierarchical Constraints , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[21]  Yici Cai,et al.  Fast poisson solver preconditioned method for robust power grid analysis , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[22]  Farid N. Najm,et al.  Power grid voltage integrity verification , 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

[23]  Jia Wang,et al.  An efficient dual algorithm for vectorless power grid verification under linear current constraints , 2010, Design Automation Conference.

[24]  Farid N. Najm,et al.  Fast vectorless power grid verification using an approximate inverse technique , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[25]  Zhiyu Zeng,et al.  Locality-Driven Parallel Static Analysis for Power Delivery Networks , 2011, TODE.

[26]  Yici Cai,et al.  Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[27]  Yici Cai,et al.  Fast vectorless power grid verification using maximum voltage drop location estimation , 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

[28]  Zhuo Feng.  Scalable Multilevel Vectorless Power Grid Voltage Integrity Verification , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[29]  Ngai Wong,et al.  More realistic power grid verification based on hierarchical current and power constraints , 2011, ISPD '11.

[30]  Farid N. Najm,et al.  Handling inductance in early power grid verification , 2006, ICCAD.

[31]  Jia Wang,et al.  Vectorless verification of RLC power grids with transient current constraints , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[32]  Eli Chiprout.  Fast flip-chip power grid analysis via locality and grid shells , 2004, ICCAD 2004.

[33]  Michel S. Nakhla,et al.  Parallel and Scalable Transient Simulator for Power Grids via Waveform Relaxation (PTS-PWR) , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[34]  Constantine Bekas,et al.  Low cost high performance uncertainty quantification , 2009, WHPCF '09.

[35]  Yici Cai,et al.  PowerRush: A linear simulator for power grid , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[36]  Lexing Ying,et al.  SelInv---An Algorithm for Selected Inversion of a Sparse Symmetric Matrix , 2011, TOMS.

[37]  Jia Wang,et al.  Constraint abstraction for vectorless power grid verification , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).